| /Zephyr-latest/dts/arm/renesas/ra/ra8/ |
| D | r7fa8t1xh.dtsi | 251 port-irqs = <&port_irq6 &port_irq7 &port_irq8
254 port-irq-names = "port-irq6",
255 "port-irq7",
256 "port-irq8",
257 "port-irq9",
258 "port-irq10",
259 "port-irq11",
260 "port-irq12",
261 "port-irq13",
262 "port-irq14";
[all …]
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| D | r7fa8m1xh.dtsi | 270 port-irqs = <&port_irq6 &port_irq7 &port_irq8
273 port-irq-names = "port-irq6",
274 "port-irq7",
275 "port-irq8",
276 "port-irq9",
277 "port-irq10",
278 "port-irq11",
279 "port-irq12",
280 "port-irq13",
281 "port-irq14";
[all …]
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| D | r7fa8d1xh.dtsi | 306 port-irqs = <&port_irq6 &port_irq7 &port_irq8
309 port-irq-names = "port-irq6",
310 "port-irq7",
311 "port-irq8",
312 "port-irq9",
313 "port-irq10",
314 "port-irq11",
315 "port-irq12",
316 "port-irq13",
317 "port-irq14";
[all …]
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| /Zephyr-latest/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_config.c | 15 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
21 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
28 static void pin_set_raw_and_verify(const struct device *port, in pin_set_raw_and_verify() argument
32 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
50 const struct device *port; in ZTEST() local
53 port = DEVICE_DT_GET(TEST_NODE); in ZTEST()
54 zassert_true(device_is_ready(port), "GPIO dev is not ready"); in ZTEST()
56 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in ZTEST()
58 ret = gpio_pin_configure(port, TEST_PIN, GPIO_OUTPUT); in ZTEST()
61 pin_set_raw_and_verify(port, TEST_PIN, 1, TEST_POINT(1)); in ZTEST()
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| D | test_pin.c | 12 static void pin_get_raw_and_verify(const struct device *port, in pin_get_raw_and_verify() argument
18 val_actual = gpio_pin_get_raw(port, pin); in pin_get_raw_and_verify()
25 static void pin_get_and_verify(const struct device *port, unsigned int pin, in pin_get_and_verify() argument
30 val_actual = gpio_pin_get(port, pin); in pin_get_and_verify()
37 static void pin_set_raw_and_verify(const struct device *port, in pin_set_raw_and_verify() argument
41 zassert_equal(gpio_pin_set_raw(port, pin, val), 0, in pin_set_raw_and_verify()
46 static void pin_set_and_verify(const struct device *port, unsigned int pin, in pin_set_and_verify() argument
50 zassert_equal(gpio_pin_set(port, pin, val), 0, in pin_set_and_verify()
62 const struct device *port; in ZTEST() local
66 port = DEVICE_DT_GET(TEST_NODE); in ZTEST()
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| D | test_port.c | 14 static void port_get_raw_and_verify(const struct device *port, in port_get_raw_and_verify() argument
20 zassert_equal(gpio_port_get_raw(port, &val_actual), 0, in port_get_raw_and_verify()
26 static void port_get_and_verify(const struct device *port, in port_get_and_verify() argument
32 zassert_equal(gpio_port_get(port, &val_actual), 0, in port_get_and_verify()
38 static void port_set_masked_raw_and_verify(const struct device *port, in port_set_masked_raw_and_verify() argument
42 zassert_equal(gpio_port_set_masked_raw(port, mask, value), 0, in port_set_masked_raw_and_verify()
47 static void port_set_masked_and_verify(const struct device *port, in port_set_masked_and_verify() argument
51 zassert_equal(gpio_port_set_masked(port, mask, value), 0, in port_set_masked_and_verify()
56 static void port_set_bits_raw_and_verify(const struct device *port, in port_set_bits_raw_and_verify() argument
59 zassert_equal(gpio_port_set_bits_raw(port, pins), 0, in port_set_bits_raw_and_verify()
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| /Zephyr-latest/dts/arm/renesas/ra/ra6/ |
| D | r7fa6m1ad3cfp.dtsi | 180 port-irqs = <&port_irq6 &port_irq7 &port_irq8
183 port-irq-names = "port-irq6",
184 "port-irq7",
185 "port-irq8",
186 "port-irq9",
187 "port-irq10",
188 "port-irq11",
189 "port-irq12",
190 "port-irq13";
191 port-irq6-pins = <0>;
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| D | r7fa6m2ax.dtsi | 212 port-irqs = <&port_irq6 &port_irq7 &port_irq8
215 port-irq-names = "port-irq6",
216 "port-irq7",
217 "port-irq8",
218 "port-irq9",
219 "port-irq10",
220 "port-irq11",
221 "port-irq12",
222 "port-irq13";
223 port-irq6-pins = <0>;
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| D | r7fa6m3ax.dtsi | 21 port = <8>;
31 port = <9>;
41 port = <10>;
51 port = <11>;
276 port-irqs = <&port_irq6 &port_irq7 &port_irq8
279 port-irq-names = "port-irq6",
280 "port-irq7",
281 "port-irq8",
282 "port-irq9",
283 "port-irq10",
[all …]
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| D | r7fa6e10x.dtsi | 24 port = <6>;
34 port = <7>;
253 port-irqs = <&port_irq6 &port_irq7 &port_irq8
256 port-irq-names = "port-irq6",
257 "port-irq7",
258 "port-irq8",
259 "port-irq9",
260 "port-irq10",
261 "port-irq11",
262 "port-irq12",
[all …]
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| D | r7fa6m5xh.dtsi | 21 port = <6>;
31 port = <7>;
41 port = <8>;
51 port = <9>;
61 port = <10>;
71 port = <11>;
454 port-irqs = <&port_irq6 &port_irq7 &port_irq8
457 port-irq-names = "port-irq6",
458 "port-irq7",
459 "port-irq8",
[all …]
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| D | r7fa6e2bx.dtsi | 31 port = <8>;
230 port-irqs = <&port_irq6 &port_irq7 &port_irq8
233 port-irq-names = "port-irq6",
234 "port-irq7",
235 "port-irq8",
236 "port-irq9",
237 "port-irq10",
238 "port-irq11",
239 "port-irq12",
240 "port-irq13";
[all …]
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| /Zephyr-latest/drivers/xen/ |
| D | events.c | 29 unsigned int port = (((evtchn_handle_t *)data) - event_channels); in empty_callback() local
31 events_missed[port] = true; in empty_callback()
44 rc = alloc.port; in alloc_unbound_event_channel()
61 rc = alloc.port; in alloc_unbound_event_channel_dom0()
95 int evtchn_close(evtchn_port_t port) in evtchn_close() argument
98 .port = port, in evtchn_close()
104 int evtchn_set_priority(evtchn_port_t port, uint32_t priority) in evtchn_set_priority() argument
107 .port = port, in evtchn_set_priority()
114 void notify_evtchn(evtchn_port_t port) in notify_evtchn() argument
118 __ASSERT(port < EVTCHN_2L_NR_CHANNELS, in notify_evtchn()
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| /Zephyr-latest/include/zephyr/arch/arc/v2/ |
| D | sys_io.h | 26 void sys_out8(uint8_t data, io_port_t port) in sys_out8() argument
28 z_arc_v2_aux_reg_write(port, data); in sys_out8()
32 uint8_t sys_in8(io_port_t port) in sys_in8() argument
34 return (uint8_t)(z_arc_v2_aux_reg_read(port) & 0x000000ff); in sys_in8()
38 void sys_out16(uint16_t data, io_port_t port) in sys_out16() argument
40 z_arc_v2_aux_reg_write(port, data); in sys_out16()
44 uint16_t sys_in16(io_port_t port) in sys_in16() argument
46 return (uint16_t)(z_arc_v2_aux_reg_read(port) & 0x0000ffff); in sys_in16()
50 void sys_out32(uint32_t data, io_port_t port) in sys_out32() argument
52 z_arc_v2_aux_reg_write(port, data); in sys_out32()
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| /Zephyr-latest/subsys/tracing/user/ |
| D | tracing_user.c | 29 void __weak sys_trace_gpio_pin_interrupt_configure_enter_user(const struct device *port, in sys_trace_gpio_pin_interrupt_configure_enter_user() argument
31 void __weak sys_trace_gpio_pin_interrupt_configure_exit_user(const struct device *port, in sys_trace_gpio_pin_interrupt_configure_exit_user() argument
33 void __weak sys_trace_gpio_pin_configure_enter_user(const struct device *port, gpio_pin_t pin, in sys_trace_gpio_pin_configure_enter_user() argument
35 void __weak sys_trace_gpio_pin_configure_exit_user(const struct device *port, gpio_pin_t pin, in sys_trace_gpio_pin_configure_exit_user() argument
37 void __weak sys_trace_gpio_port_get_direction_enter_user(const struct device *port, in sys_trace_gpio_port_get_direction_enter_user() argument
41 void __weak sys_trace_gpio_port_get_direction_exit_user(const struct device *port, int ret) {} in sys_trace_gpio_port_get_direction_exit_user() argument
42 void __weak sys_trace_gpio_pin_get_config_enter_user(const struct device *port, gpio_pin_t pin, in sys_trace_gpio_pin_get_config_enter_user() argument
44 void __weak sys_trace_gpio_pin_get_config_exit_user(const struct device *port, gpio_pin_t pin, in sys_trace_gpio_pin_get_config_exit_user() argument
46 void __weak sys_trace_gpio_port_get_raw_enter_user(const struct device *port, in sys_trace_gpio_port_get_raw_enter_user() argument
48 void __weak sys_trace_gpio_port_get_raw_exit_user(const struct device *port, int ret) {} in sys_trace_gpio_port_get_raw_exit_user() argument
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| /Zephyr-latest/drivers/ethernet/ |
| D | eth_xlnx_gem_priv.h | 407 #define ETH_XLNX_GEM_NET_DEV_INIT(port) \ argument
408 ETH_NET_DEVICE_DT_INST_DEFINE(port,\
411 ð_xlnx_gem##port##_dev_data,\
412 ð_xlnx_gem##port##_dev_cfg,\
418 #define ETH_XLNX_GEM_DEV_CONFIG(port) \ argument
419 static const struct eth_xlnx_gem_dev_cfg eth_xlnx_gem##port##_dev_cfg = {\
420 .base_addr = DT_REG_ADDR_BY_IDX(DT_INST(port, xlnx_gem), 0),\
421 .config_func = eth_xlnx_gem##port##_irq_config,\
422 .pll_clock_frequency = DT_INST_PROP(port, clock_frequency),\
423 .clk_ctrl_reg_address = DT_REG_ADDR_BY_IDX(DT_INST(port, xlnx_gem), 1),\
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| /Zephyr-latest/subsys/net/lib/ptp/ |
| D | port.c | 82 static int port_msg_send(struct ptp_port *port, struct ptp_msg *msg, enum ptp_socket idx) in port_msg_send() argument
86 return ptp_transport_send(port, msg, idx); in port_msg_send()
117 static void port_synchronize(struct ptp_port *port, in port_synchronize() argument
131 port_timer_set_timeout(&port->timers.sync, in port_synchronize()
132 port->port_ds.announce_receipt_timeout, in port_synchronize()
133 port->port_ds.log_sync_interval); in port_synchronize()
136 static void port_ds_init(struct ptp_port *port) in port_ds_init() argument
138 struct ptp_port_ds *ds = &port->port_ds; in port_ds_init()
157 struct ptp_port *port = ptp_clock_port_from_iface(pkt->iface); in port_delay_req_timestamp_cb() local
161 if (!port || !msg) { in port_delay_req_timestamp_cb()
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| /Zephyr-latest/dts/arm/renesas/ra/ra4/ |
| D | r7fa4m2ax.dtsi | 25 port = <6>;
35 port = <7>;
274 port-irqs = <&port_irq6 &port_irq7 &port_irq8
277 port-irq-names = "port-irq6",
278 "port-irq7",
279 "port-irq8",
280 "port-irq9",
281 "port-irq10",
282 "port-irq11",
283 "port-irq12",
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| D | r7fa4m1ax.dtsi | 20 port = <6>;
30 port = <7>;
40 port = <8>;
70 #port-irq-cells = <0>;
79 #port-irq-cells = <0>;
88 #port-irq-cells = <0>;
97 #port-irq-cells = <0>;
242 port-irqs = <&port_irq2 &port_irq3 &port_irq6
244 port-irq-names = "port-irq2",
245 "port-irq3",
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| D | r7fa4m3ax.dtsi | 23 port = <6>;
33 port = <7>;
43 port = <8>;
284 port-irqs = <&port_irq6 &port_irq7 &port_irq8
287 port-irq-names = "port-irq6",
288 "port-irq7",
289 "port-irq8",
290 "port-irq9",
291 "port-irq10",
292 "port-irq11",
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| D | r7fa4e2b93cfm.dtsi | 34 port = <8>;
232 port-irqs = <&port_irq6 &port_irq7 &port_irq8
235 port-irq-names = "port-irq6",
236 "port-irq7",
237 "port-irq8",
238 "port-irq9",
239 "port-irq10",
240 "port-irq11",
241 "port-irq12",
242 "port-irq13";
[all …]
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| D | r7fa4e10x.dtsi | 196 port-irqs = <&port_irq6 &port_irq7 &port_irq8
198 port-irq-names = "port-irq6",
199 "port-irq7",
200 "port-irq8",
201 "port-irq9",
202 "port-irq13";
203 port-irq6-pins = <0>;
204 port-irq7-pins = <1>;
205 port-irq8-pins = <2>;
206 port-irq9-pins = <4>;
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_renesas_rz.h | 21 #define GPIO_RZ_IOPORT_P_REG_GET(port, pin) (&GPIO_RZ_IOPORT_P_REG_BASE_GET[port + (pin / 4)]) argument
22 #define GPIO_RZ_IOPORT_PM_REG_GET(port, pin) (&GPIO_RZ_IOPORT_PM_REG_BASE_GET[port + (pin / 4)]) argument
23 #define GPIO_RZ_IOPORT_PFC_REG_GET(port, pin) (&GPIO_RZ_IOPORT_PFC_REG_BASE_GET[port + (pin / 4)]) argument
31 #define GPIO_RZ_PIN_DISCONNECT(port, pin) /* do nothing */ argument
45 #define GPIO_RZ_TSSR_VAL(port, pin) (0x80 | (gpio_rz_int[port] + pin)) argument
64 #define GPIO_RZ_IOPORT_P_REG_BASE_GET(port, pin) \ argument
65 (GPIO_RZ_IOPORT_REG_REGION_GET((port << 8U) | pin) == 1 ? &R_PORT_NSR->P[port] \
66 : &R_PORT_SR->P[port])
68 #define GPIO_RZ_IOPORT_PM_REG_BASE_GET(port, pin) \ argument
69 (GPIO_RZ_IOPORT_REG_REGION_GET((port << 8U) | pin) == 1 ? &R_PORT_NSR->PM[port] \
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| D | gpio_handlers.c | 10 static inline int z_vrfy_gpio_pin_configure(const struct device *port, in z_vrfy_gpio_pin_configure() argument
14 K_OOPS(K_SYSCALL_DRIVER_GPIO(port, pin_configure)); in z_vrfy_gpio_pin_configure()
15 return z_impl_gpio_pin_configure((const struct device *)port, in z_vrfy_gpio_pin_configure()
22 static inline int z_vrfy_gpio_pin_get_config(const struct device *port, in z_vrfy_gpio_pin_get_config() argument
26 K_OOPS(K_SYSCALL_DRIVER_GPIO(port, pin_get_config)); in z_vrfy_gpio_pin_get_config()
29 return z_impl_gpio_pin_get_config(port, pin, flags); in z_vrfy_gpio_pin_get_config()
34 static inline int z_vrfy_gpio_port_get_raw(const struct device *port, in z_vrfy_gpio_port_get_raw() argument
37 K_OOPS(K_SYSCALL_DRIVER_GPIO(port, port_get_raw)); in z_vrfy_gpio_port_get_raw()
39 return z_impl_gpio_port_get_raw((const struct device *)port, in z_vrfy_gpio_port_get_raw()
44 static inline int z_vrfy_gpio_port_set_masked_raw(const struct device *port, in z_vrfy_gpio_port_set_masked_raw() argument
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| /Zephyr-latest/drivers/misc/timeaware_gpio/ |
| D | timeaware_gpio_handlers.c | 9 static inline int z_vrfy_tgpio_port_get_time(const struct device *port, uint64_t *current_time) in z_vrfy_tgpio_port_get_time() argument
11 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, get_time)); in z_vrfy_tgpio_port_get_time()
13 return z_impl_tgpio_port_get_time((const struct device *)port, (uint64_t *)current_time); in z_vrfy_tgpio_port_get_time()
17 static inline int z_vrfy_tgpio_port_get_cycles_per_second(const struct device *port, in z_vrfy_tgpio_port_get_cycles_per_second() argument
20 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, cyc_per_sec)); in z_vrfy_tgpio_port_get_cycles_per_second()
22 return z_impl_tgpio_port_get_cycles_per_second((const struct device *)port, in z_vrfy_tgpio_port_get_cycles_per_second()
27 static inline int z_vrfy_tgpio_pin_periodic_output(const struct device *port, uint32_t pin, in z_vrfy_tgpio_pin_periodic_output() argument
31 K_OOPS(Z_SYSCALL_DRIVER_TGPIO(port, set_perout)); in z_vrfy_tgpio_pin_periodic_output()
32 return z_impl_tgpio_pin_periodic_output((const struct device *)port, pin, start_time, in z_vrfy_tgpio_pin_periodic_output()
37 static inline int z_vrfy_tgpio_pin_disable(const struct device *port, uint32_t pin) in z_vrfy_tgpio_pin_disable() argument
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