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/Zephyr-latest/samples/subsys/pm/latency/boards/
Dnative_sim.overlay3 * SPDX-License-Identifier: Apache-2.0
7 power-states {
8 runtime_idle: runtime-idle {
9 compatible = "zephyr,power-state";
10 power-state-name = "runtime-idle";
11 min-residency-us = <1000000>;
12 exit-latency-us = <10000>;
14 suspend_to_idle: suspend-to-idle {
15 compatible = "zephyr,power-state";
16 power-state-name = "suspend-to-idle";
[all …]
/Zephyr-latest/tests/subsys/pm/power_states_api/boards/
Dnative_sim.overlay4 * SPDX-License-Identifier: Apache-2.0
10 cpu-power-states = <&state0 &state1 &state2 &state3>;
13 power-states {
15 compatible = "zephyr,power-state";
16 power-state-name = "suspend-to-idle";
17 min-residency-us = <10000>;
18 exit-latency-us = <100>;
22 compatible = "zephyr,power-state";
23 power-state-name = "standby";
24 min-residency-us = <20000>;
[all …]
/Zephyr-latest/tests/subsys/pm/policy_api/
Dapp.overlay3 * SPDX-License-Identifier: Apache-2.0
9 compatible = "zephyr,native-posix-cpu";
11 cpu-power-states = <&state2>;
15 power-states {
17 compatible = "zephyr,power-state";
18 power-state-name = "runtime-idle";
19 min-residency-us = <100000>;
20 exit-latency-us = <10000>;
21 substate-id = <1>;
25 compatible = "zephyr,power-state";
[all …]
/Zephyr-latest/samples/boards/st/power_mgmt/suspend_to_ram/boards/
Dnucleo_wba55cg.overlay2 * SPDX-License-Identifier: Apache-2.0
11 cpu-power-states = <&stop0 &stop1 &standby>;
14 power-states {
16 min-residency-us = <500000>;
17 exit-latency-us = <50>;
20 min-residency-us = <1000000>;
21 exit-latency-us = <100>;
24 min-residency-us = <2000000>;
25 exit-latency-us = <1000>;
32 io-channels = <&adc4 8>;
[all …]
/Zephyr-latest/dts/bindings/power/
Dzephyr,power-state.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,power-state"
9 power-state-name:
14 - "active"
15 - "runtime-idle"
16 - "suspend-to-idle"
17 - "standby"
18 - "suspend-to-ram"
19 - "suspend-to-disk"
20 - "soft-off"
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/Zephyr-latest/include/zephyr/pm/
Dstate.h4 * SPDX-License-Identifier: Apache-2.0
52 * peripherals into low-power states. No operating state is lost (ie.
62 * In addition to putting peripherals into low-power states all
63 * non-boot CPUs are powered off. It should allow more energy to be
64 * saved relative to suspend to idle, but the resume latency will
76 * self-refresh mode to retain its contents. The state of devices and
77 * CPUs is saved and held in memory, and it may require some boot-
88 * memory are written to disk or other non-volatile storage, and on
89 * resume it's read back into memory with the help of boot-strapping
100 * latency in order to return to runtime active state. The contents of
[all …]
/Zephyr-latest/soc/st/stm32/stm32f4x/
Dpower.c4 * SPDX-License-Identifier: Apache-2.0
37 * low-power mode takes typically 8us, max 13us more time than with the main in pm_state_set()
38 * regulator. We are using RTC as a wakeup source, which has a tick 62,5us. in pm_state_set()
39 * It means we have to add significant margin to the exit-latency anyway, in pm_state_set()
40 * so it is worth always using the low-power regulator. in pm_state_set()
67 LOG_DBG("Unsupported power substate-id %u", state); in pm_state_exit_post_ops()
/Zephyr-latest/doc/services/pm/
Ddevice.rst15 - :ref:`Device Runtime Power Management <pm-device-runtime-pm>`
16 - :ref:`System-Managed Device Power Management <pm-device-system-pm>`
18 .. _pm-device-runtime-pm:
34 - **Device drivers** are responsible for managing the
36 put devices into low-power states (suspend) when they are not in
41 - **Subsystems**, such as sensors, file systems,
49 - **Applications** running on Zephyr can impact device
68 For more information, see :ref:`pm-device-runtime`.
70 .. _pm-device-system-pm:
72 System-Managed Device Power Management
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/Zephyr-latest/dts/arm/silabs/
Defr32bg2x.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/pinctrl/gecko-pinctrl.h>
11 #include <dt-bindings/adc/adc.h>
16 zephyr,flash-controller = &msc;
22 #clock-cells = <0>;
23 compatible = "fixed-factor-clock";
27 #clock-cells = <0>;
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Defr32mg24.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/adc/adc.h>
11 #include <dt-bindings/clock/silabs/xg24-clock.h>
16 zephyr,flash-controller = &msc;
22 #clock-cells = <0>;
23 compatible = "fixed-factor-clock";
27 #clock-cells = <0>;
[all …]
Defr32xg23.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/adc/adc.h>
11 #include <dt-bindings/clock/silabs/xg23-clock.h>
16 zephyr,flash-controller = &msc;
22 #clock-cells = <0>;
23 compatible = "fixed-factor-clock";
27 #clock-cells = <0>;
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/Zephyr-latest/dts/riscv/espressif/esp32c6/
Desp32c6_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h>
11 #include <zephyr/dt-bindings/clock/esp32c6_clock.h>
12 #include <dt-bindings/pinctrl/esp32c6-pinctrl.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
20 zephyr,flash-controller = &flash;
24 #address-cells = <1>;
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/Zephyr-latest/boards/nxp/frdm_ke17z/
Dfrdm_ke17z.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "frdm_ke17z-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
16 compatible = "nxp,frdm-ke17z", "nxp,ke17z", "nxp,mke17z7";
25 pwm-led0 = &red_pwm_led;
26 pwm-led1 = &green_pwm_led;
27 pwm-led2 = &blue_pwm_led;
28 mcuboot-button0 = &user_button_0;
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/Zephyr-latest/boards/nxp/frdm_ke17z512/
Dfrdm_ke17z512.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "frdm_ke17z512-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,code-partition = &slot0_partition;
22 zephyr,uart-mcumgr = &lpuart2;
24 zephyr,shell-uart = &lpuart2;
34 pwm-led0 = &red_pwm_led;
35 pwm-led1 = &green_pwm_led;
[all …]
/Zephyr-latest/dts/riscv/espressif/esp32c3/
Desp32c3_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/interrupt-controller/esp-esp32c3-intmux.h>
12 #include <zephyr/dt-bindings/clock/esp32c3_clock.h>
13 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 die-temp0 = &coretemp;
[all …]
/Zephyr-latest/dts/arm/ambiq/
Dambiq_apollo3_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
Dambiq_apollo4p.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
Dambiq_apollo3p_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
/Zephyr-latest/soc/microchip/mec/mec15xx/
Dpower.c5 * SPDX-License-Identifier: Apache-2.0
21 * Longer wake latency. CPU start running on ring oscillator
26 * We touch the Cortex-M's primary mask and base priority registers
67 while ((PCR_REGS->OSC_ID & MCHP_PCR_OSC_ID_PLL_LOCK) == 0) { in z_power_soc_deep_sleep()
122 * Zephyr PM code expects us to enabled interrupts at post op exit. Zephyr used
123 * arch_irq_lock() which sets BASEPRI to a non-zero value masking all interrupts
126 * an ISR on wake except for faults. We re-enable interrupts by setting PRIMASK
/Zephyr-latest/samples/boards/nordic/nrf53_sync_rtc/
DREADME.rst1 .. zephyr:code-sample:: nrf_sync_rtc
20 may be slightly behind (usually 1 tick) due to latency introduced by the
23 For simplicity and low latency sample is not using more sophisticated IPM protocols.
28 .. zephyr-app-commands::
29 :zephyr-app: samples/boards/nordic/nrf53_sync_rtc
32 :flash-args: --hex-file build/nrf53_sync_rtc/zephyr/zephyr.hex
33 :west-args: --sysbuild
38 - Speed: 115200
39 - Data: 8 bits
40 - Parity: None
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/Zephyr-latest/dts/xtensa/espressif/esp32s2/
Desp32s2_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32s2_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
21 die-temp0 = &coretemp;
[all …]
/Zephyr-latest/soc/microchip/mec/mec172x/
Dpower.c5 * SPDX-License-Identifier: Apache-2.0
29 * Longer wake latency. CPU start running on ring oscillator
34 * We touch the Cortex-M's primary mask and base priority registers
72 SCB->SCR |= BIT(2); in z_power_soc_deep_sleep()
73 pcr->SYS_SLP_CTRL = MCHP_PCR_SYS_SLP_HEAVY; in z_power_soc_deep_sleep()
74 pcr->OSC_ID = pcr->SYS_SLP_CTRL; in z_power_soc_deep_sleep()
86 * PM post ops. This de-asserts peripheral SLP_EN signals. in z_power_soc_deep_sleep()
88 pcr->SYS_SLP_CTRL = 0U; in z_power_soc_deep_sleep()
89 SCB->SCR &= ~BIT(2); in z_power_soc_deep_sleep()
92 htmr0->PRLD = 0U; /* make sure its stopped */ in z_power_soc_deep_sleep()
[all …]
/Zephyr-latest/dts/arm/ti/
Dcc13xx_cc26xx.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
[all …]
/Zephyr-latest/dts/xtensa/espressif/esp32/
Desp32_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/clock/esp32_clock.h>
13 #include <zephyr/dt-bindings/interrupt-controller/esp-xtensa-intmux.h>
14 #include <dt-bindings/pinctrl/esp32-pinctrl.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,flash-controller = &flash;
22 zephyr,bt-hci = &esp32_bt_hci;
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/Zephyr-latest/boards/nxp/twr_ke18f/
Dtwr_ke18f.dts2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/clock/kinetis_scg.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include "twr_ke18f-pinctrl.dtsi"
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
27 pwm-led0 = &orange_pwm_led;
28 pwm-led1 = &yellow_pwm_led;
29 pwm-led2 = &green_pwm_led;
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