Lines Matching +full:exit +full:- +full:latency +full:- +full:us
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/pinctrl/gecko-pinctrl.h>
11 #include <dt-bindings/adc/adc.h>
16 zephyr,flash-controller = &msc;
22 #clock-cells = <0>;
23 compatible = "fixed-factor-clock";
27 #clock-cells = <0>;
28 compatible = "fixed-factor-clock";
31 clock-div = <1>;
34 #clock-cells = <0>;
35 compatible = "fixed-factor-clock";
38 clock-div = <2>;
41 #clock-cells = <0>;
42 compatible = "fixed-factor-clock";
45 clock-div = <2>;
48 #clock-cells = <0>;
49 compatible = "fixed-factor-clock";
52 clock-div = <1024>;
55 #clock-cells = <0>;
56 compatible = "fixed-factor-clock";
59 clock-div = <1>;
62 #clock-cells = <0>;
63 compatible = "fixed-factor-clock";
67 #clock-cells = <0>;
68 compatible = "fixed-factor-clock";
72 #clock-cells = <0>;
73 compatible = "fixed-factor-clock";
77 #clock-cells = <0>;
78 compatible = "fixed-factor-clock";
82 #clock-cells = <0>;
83 compatible = "fixed-factor-clock";
87 #clock-cells = <0>;
88 compatible = "fixed-factor-clock";
92 #clock-cells = <0>;
93 compatible = "fixed-factor-clock";
97 #clock-cells = <0>;
98 compatible = "fixed-factor-clock";
104 #address-cells = <1>;
105 #size-cells = <0>;
108 compatible = "arm,cortex-m33";
116 * - for EM2, EM3: BURTC used as sys_clock
117 * - for EM3: BURTC clocked from ULFRCO
122 * The minimum residency and exit latency is
125 cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em3>;
128 power-states {
130 * EM1 is a basic "CPU WFI idle", all high-freq clocks remain
134 compatible = "zephyr,power-state";
135 power-state-name = "runtime-idle";
144 compatible = "zephyr,power-state";
145 power-state-name = "suspend-to-idle";
155 compatible = "zephyr,power-state";
156 power-state-name = "standby";
162 compatible = "mmio-sram";
167 compatible = "silabs,series-clock";
169 interrupt-names = "cmu";
171 #clock-cells = <2>;
175 #clock-cells = <0>;
176 compatible = "fixed-clock";
178 clock-frequency = <DT_FREQ_M(20)>;
182 #clock-cells = <0>;
185 clock-frequency = <DT_FREQ_K(38400)>;
192 #clock-cells = <0>;
193 compatible = "silabs,series2-lfxo";
195 clock-frequency = <32768>;
203 #clock-cells = <0>;
204 compatible = "silabs,series2-hfrcodpll";
206 clock-frequency = <DT_FREQ_M(19)>;
210 #clock-cells = <0>;
211 compatible = "silabs,series2-lfrco";
213 clock-frequency = <32768>;
217 #clock-cells = <0>;
218 compatible = "fixed-clock";
220 clock-frequency = <1000>;
223 msc: flash-controller@50030000 {
224 compatible = "silabs,series2-flash-controller";
228 #address-cells = <1>;
229 #size-cells = <1>;
233 compatible = "silabs,usart-spi";
235 interrupt-names = "rx", "tx";
236 #address-cells = <1>;
237 #size-cells = <0>;
242 compatible = "silabs,usart-uart";
244 interrupt-names = "rx", "tx";
249 compatible = "silabs,gecko-burtc";
255 compatible = "silabs,gecko-stimer";
257 clock-frequency = <32768>;
263 compatible = "silabs,gecko-trng";
270 compatible = "silabs,gecko-i2c";
271 clock-frequency = <I2C_BITRATE_STANDARD>;
273 #address-cells = <1>;
274 #size-cells = <0>;
279 compatible = "silabs,gecko-i2c";
280 clock-frequency = <I2C_BITRATE_STANDARD>;
282 #address-cells = <1>;
283 #size-cells = <0>;
288 compatible = "silabs,gecko-gpio";
291 #address-cells = <1>;
292 #size-cells = <1>;
295 pinctrl: pin-controller@5003c440 {
296 compatible = "silabs,dbus-pinctrl";
298 reg-names = "dbus", "abus";
304 #dma-cells = <1>;
310 compatible = "silabs,gecko-wdog";
312 peripheral-id = <0>;
318 compatible = "silabs,gecko-iadc";
322 #io-channel-cells = <1>;
326 compatible = "silabs,series2-dcdc";
332 compatible = "silabs,series2-radio";
334 pa-initial-power-dbm = <10>;
335 pa-ramp-time-us = <2>;
336 pa-voltage-mv = <3300>;
337 pa-2p4ghz = "highest";
340 compatible = "silabs,bt-hci-efr32";
348 arm,num-irq-priority-bits = <4>;