1/*
2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_ke18f512vlx16.dtsi>
10#include <zephyr/dt-bindings/clock/kinetis_scg.h>
11#include <zephyr/dt-bindings/pwm/pwm.h>
12#include "twr_ke18f-pinctrl.dtsi"
13#include <zephyr/dt-bindings/input/input-event-codes.h>
14
15/ {
16	model = "NXP Kinetis KE18 MCU Tower System Module";
17	compatible = "nxp,mke18f16", "nxp,ke18f", "nxp,ke1xf";
18
19	aliases {
20		led0 = &orange_led;
21		led1 = &yellow_led;
22		led2 = &green_led;
23		led3 = &red_led;
24		led4 = &tri_red_led;
25		led5 = &tri_green_led;
26		led6 = &tri_blue_led;
27		pwm-led0 = &orange_pwm_led;
28		pwm-led1 = &yellow_pwm_led;
29		pwm-led2 = &green_pwm_led;
30		pwm-led3 = &red_pwm_led;
31		red-pwm-led = &tri_red_pwm_led;
32		green-pwm-led = &tri_green_pwm_led;
33		blue-pwm-led = &tri_blue_pwm_led;
34		sw0 = &user_button_3;
35		sw1 = &user_button_2;
36		magn0 = &fxos8700;
37		accel0 = &fxos8700;
38		mcuboot-button0 = &user_button_3;
39	};
40
41	chosen {
42		/*
43		 * Note: when using DMA, the SRAM region must be set to
44		 * a memory region that is not cached by the chip. If the chosen
45		 * sram region is changed and DMA is in use, you will
46		 * encounter issues!
47		 */
48		zephyr,sram = &sram0;
49		zephyr,flash = &flash0;
50		zephyr,code-partition = &slot0_partition;
51		zephyr,uart-mcumgr = &lpuart0;
52		zephyr,console = &lpuart0;
53		zephyr,shell-uart = &lpuart0;
54		zephyr,uart-pipe = &lpuart0;
55		zephyr,canbus = &flexcan0;
56	};
57
58	leds {
59		compatible = "gpio-leds";
60		orange_led: led_0 {
61			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
62			label = "User LED D9";
63		};
64		yellow_led: led_1 {
65			gpios = <&gpioc 12 GPIO_ACTIVE_LOW>;
66			label = "User LED D8";
67		};
68		green_led: led_2 {
69			gpios = <&gpioc 11 GPIO_ACTIVE_LOW>;
70			label = "User LED D7";
71		};
72		red_led: led_3 {
73			gpios = <&gpioc 10 GPIO_ACTIVE_LOW>;
74			label = "User LED D6";
75		};
76
77		tri_red_led: led_4 {
78			gpios = <&gpiod 16 GPIO_ACTIVE_LOW>;
79			label = "User Tricolor LED D5 (Red)";
80		};
81		tri_green_led: led_5 {
82			gpios = <&gpiod 15 GPIO_ACTIVE_LOW>;
83			label = "User Tricolor LED D5 (Green)";
84		};
85		tri_blue_led: led_6 {
86			gpios = <&gpiob 5 GPIO_ACTIVE_LOW>;
87			label = "User Tricolor LED D5 (Blue)";
88		};
89	};
90
91	pwmleds {
92		compatible = "pwm-leds";
93		orange_pwm_led: led_pwm_0 {
94			pwms = <&ftm3 7 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
95			label = "User PWM LED D9";
96		};
97		yellow_pwm_led: led_pwm_1 {
98			pwms = <&ftm3 6 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
99			label = "User PWM LED D8";
100		};
101		green_pwm_led: led_pwm_2 {
102			pwms = <&ftm3 5 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
103			label = "User PWM LED D7";
104		};
105		red_pwm_led: led_pwm_3 {
106			pwms = <&ftm3 4 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
107			label = "User PWM LED D6";
108		};
109
110		tri_red_pwm_led: led_pwm_4 {
111			pwms = <&ftm0 1 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
112			label = "User Tricolor PWM LED D5 (Red)";
113		};
114		tri_green_pwm_led: led_pwm_5 {
115			pwms = <&ftm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
116			label = "User Tricolor PWM LED D5 (Green)";
117		};
118		tri_blue_pwm_led: led_pwm_6 {
119			pwms = <&ftm0 5 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
120			label = "User Tricolor PWM LED D5 (Blue)";
121		};
122	};
123
124	gpio_keys {
125		compatible = "gpio-keys";
126		user_button_2: button_0 {
127			label = "User SW2";
128			gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
129			zephyr,code = <INPUT_KEY_0>;
130		};
131		user_button_3: button_1 {
132			label = "User SW3";
133			gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
134			zephyr,code = <INPUT_KEY_1>;
135		};
136	};
137};
138
139&cpu0 {
140	clock-frequency = <120000000>;
141};
142
143&idle {
144	min-residency-us = <1>;
145};
146
147&stop {
148	min-residency-us = <20000>;
149	exit-latency-us = <13>;
150};
151
152&sim {
153	clkout-source = <1>;
154	clkout-divider = <0>;
155};
156
157&scg {
158	sosc-mode = <KINETIS_SCG_SOSC_MODE_LOW_POWER>;
159
160	sosc_clk {
161		status = "okay";
162		clock-frequency = <8000000>;
163	};
164
165	pll {
166		clock-mult = <30>;
167	};
168
169	core_clk {
170		clocks = <&spll_clk>;
171	};
172
173	bus_clk {
174		clock-div = <2>;
175	};
176
177	slow_clk {
178		clock-div = <5>;
179	};
180
181	clkout_clk {
182		status = "okay";
183	};
184
185	splldiv1_clk {
186		clock-div = <1>;
187	};
188
189	splldiv2_clk {
190		clock-div = <2>;
191	};
192
193	sircdiv1_clk {
194		clock-div = <1>;
195	};
196
197	sircdiv2_clk {
198		clock-div = <2>;
199	};
200
201	fircdiv1_clk {
202		clock-div = <1>;
203	};
204
205	fircdiv2_clk {
206		clock-div = <1>;
207	};
208
209	soscdiv1_clk {
210		clock-div = <1>;
211	};
212
213	soscdiv2_clk {
214		clock-div = <1>;
215	};
216};
217
218&lpuart0 {
219	status = "okay";
220	current-speed = <115200>;
221	pinctrl-0 = <&lpuart0_default>;
222	pinctrl-names = "default";
223};
224
225&ftm0 {
226	status = "okay";
227	compatible = "nxp,ftm-pwm";
228	#pwm-cells = <3>;
229	pinctrl-0 = <&ftm0_default>;
230	pinctrl-names = "default";
231	clock-source = "fixed";
232};
233
234&ftm3 {
235	status = "okay";
236	compatible = "nxp,ftm-pwm";
237	#pwm-cells = <3>;
238	pinctrl-0 = <&ftm3_default>;
239	pinctrl-names = "default";
240	clock-source = "fixed";
241};
242
243&lpi2c0 {
244	status = "okay";
245	pinctrl-0 = <&lpi2c0_default>;
246	pinctrl-names = "default";
247	scl-gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
248	sda-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
249
250	fxos8700: fxos8700@1d {
251		compatible = "nxp,fxos8700";
252		reg = <0x1d>;
253		reset-gpios = <&gpioc 15 GPIO_ACTIVE_HIGH>;
254	};
255};
256
257&lpi2c1 {
258	status = "okay";
259	pinctrl-0 = <&lpi2c1_default>;
260	pinctrl-names = "default";
261	scl-gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
262	sda-gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>;
263};
264
265&lpspi0 {
266	dmas = <&edma 0 14>, <&edma 1 15>;
267	dma-names = "rx", "tx";
268	status = "okay";
269	pinctrl-0 = <&lpspi0_default>;
270	pinctrl-names = "default";
271};
272
273&lpspi1 {
274	status = "okay";
275	pinctrl-0 = <&lpspi1_default>;
276	pinctrl-names = "default";
277};
278
279&dac0 {
280	status = "okay";
281	pinctrl-0 = <&dac0_default>;
282	pinctrl-names = "default";
283};
284
285&adc0 {
286	status = "okay";
287	sample-time = <12>;
288	vref-mv = <3300>;
289	pinctrl-0 = <&adc0_default>;
290	pinctrl-names = "default";
291};
292
293&temp0 {
294	status = "okay";
295};
296
297&flexcan0 {
298	status = "okay";
299	pinctrl-0 = <&flexcan0_default>;
300	pinctrl-names = "default";
301
302	can-transceiver {
303		max-bitrate = <1000000>;
304	};
305};
306
307&gpioa {
308	status = "okay";
309};
310
311&gpiob {
312	status = "okay";
313};
314
315&gpioc {
316	status = "okay";
317};
318
319&gpiod {
320	status = "okay";
321};
322
323&gpioe {
324	status = "okay";
325};
326
327&edma {
328	status = "okay";
329};
330
331&flexio1 {
332	status = "okay";
333};
334
335&flash0 {
336
337	partitions {
338		compatible = "fixed-partitions";
339		#address-cells = <1>;
340		#size-cells = <1>;
341		boot_partition: partition@0 {
342			label = "mcuboot";
343			reg = <0x00000000 DT_SIZE_K(64)>;
344			read-only;
345		};
346		/* The MCUBoot swap-move algorithm uses the last 2 sectors
347		 * of the primary slot0 for swap status and move.
348		 */
349		slot0_partition: partition@10000 {
350			label = "image-0";
351			reg = <0x00010000 (DT_SIZE_K(200) + DT_SIZE_K(8))>;
352		};
353		slot1_partition: partition@44000 {
354			label = "image-1";
355			reg = <0x00044000 DT_SIZE_K(200)>;
356		};
357		storage_partition: partition@76000 {
358			label = "storage";
359			reg = <0x00076000 DT_SIZE_K(40)>;
360		};
361	};
362};
363