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Searched defs:clock (Results 1 – 25 of 69) sorted by relevance

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/Zephyr-latest/lib/libc/common/source/time/
Dctime.c16 char *ctime(const time_t *clock) in ctime()
22 char *ctime_r(const time_t *clock, char *buf) in ctime_r()
/Zephyr-latest/tests/kernel/common/src/
Dclock.c41 ZTEST_USER(clock, test_clock_uptime) in ZTEST_USER() argument
110 ZTEST(clock, test_clock_cycle_32) in ZTEST() argument
147 ZTEST(clock, test_clock_cycle_64) in ZTEST() argument
208 ZTEST(clock, test_ms_time_duration) in ZTEST() argument
/Zephyr-latest/tests/posix/common/src/
Dclock.c66 ZTEST(clock, test_clock_gettime) in ZTEST() argument
92 ZTEST(clock, test_gettimeofday) in ZTEST() argument
117 ZTEST(clock, test_clock_settime) in ZTEST() argument
166 ZTEST(clock, test_realtime) in ZTEST() argument
217 ZTEST(clock, test_clock_getcpuclockid) in ZTEST() argument
230 ZTEST(clock, test_clock_getres) in ZTEST() argument
/Zephyr-latest/tests/net/ptp/clock/
DCMakeLists.txt5 project(clock) project
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_mp1.c119 static int stm32_clock_control_get_subsys_rate(const struct device *clock, in stm32_clock_control_get_subsys_rate()
Dclock_control_smartbond.c573 #define ENABLE_OSC(clock) smartbond_clock_control_on_by_ord(dev, DT_DEP_ORD(clock)) in smartbond_clocks_init() argument
574 #define DISABLE_OSC(clock) if (DT_NODE_HAS_STATUS(clock, disabled)) { \ in smartbond_clocks_init() argument
Dclock_stm32_ll_common.c100 static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler) in get_bus_clock()
329 static int stm32_clock_control_get_subsys_rate(const struct device *clock, in stm32_clock_control_get_subsys_rate()
Dbeetle_clock_control.c131 static int beetle_clock_control_get_subsys_rate(const struct device *clock, in beetle_clock_control_get_subsys_rate()
/Zephyr-latest/dts/arm64/intel/
Dintel_socfpga_agilex.dtsi70 clock: clock@ffd10000 { label
Dintel_socfpga_agilex5.dtsi79 clock: clock@10d10000 { label
/Zephyr-latest/drivers/entropy/
Dentropy_max32.c19 const struct device *clock; member
/Zephyr-latest/dts/arm/nordic/
Dnrf52805.dtsi48 clock: clock@40000000 { label
Dnrf51822.dtsi60 clock: clock@40000000 { label
Dnrf52810.dtsi52 clock: clock@40000000 { label
Dnrf5340_cpunet.dtsi58 clock: clock@41005000 { label
Dnrf52811.dtsi56 clock: clock@40000000 { label
Dnrf91_peripherals.dtsi339 clock: clock@5000 { label
Dnrf52820.dtsi56 clock: clock@40000000 { label
Dnrf52832.dtsi52 clock: clock@40000000 { label
/Zephyr-latest/dts/arm/nxp/
Dnxp_s32k1xx.dtsi140 clock: clock-controller@40064000 { label
/Zephyr-latest/drivers/pwm/
Dpwm_max32.c25 const struct device *clock; member
Dpwm_gecko.c17 CMU_Clock_TypeDef clock; member
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dstm32_clock_control.h476 #define STM32_CLOCK_REG_GET(clock) \ argument
484 #define STM32_CLOCK_SHIFT_GET(clock) \ argument
492 #define STM32_CLOCK_MASK_GET(clock) \ argument
500 #define STM32_CLOCK_VAL_GET(clock) \ argument
/Zephyr-latest/drivers/serial/
Duart_numicro.c23 const struct device *clock; member
/Zephyr-latest/drivers/ethernet/
Deth_stm32_hal_priv.h50 const struct device *clock; member

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