Searched refs:bits (Results 526 – 550 of 680) sorted by relevance
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_mcxw71.dtsi | 125 arm,num-irq-priority-bits = <3>;
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| D | nxp_rt5xx_common.dtsi | 695 num-bits = <24>;
743 arm,num-irq-priority-bits = <3>;
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| D | nxp_k2x.dtsi | 388 arm,num-irq-priority-bits = <4>;
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| D | nxp_mcxa156.dtsi | 418 arm,num-irq-priority-bits = <3>;
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| /Zephyr-latest/dts/arm/renesas/ra/ra2/ |
| D | ra2xx.dtsi | 371 arm,num-irq-priority-bits = <2>;
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| /Zephyr-latest/dts/arm/silabs/ |
| D | efr32mg21.dtsi | 362 arm,num-irq-priority-bits = <4>;
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| D | efr32bg2x.dtsi | 384 arm,num-irq-priority-bits = <4>;
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| /Zephyr-latest/boards/microchip/mec172xevb_assy6906/doc/ |
| D | index.rst | 378 - Data: 8 bits
380 - Stop bits: 1
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| /Zephyr-latest/boards/nxp/mimxrt1064_evk/doc/ |
| D | index.rst | 356 - Data: 8 bits
358 - Stop bits: 1
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| /Zephyr-latest/boards/nxp/mimxrt1050_evk/doc/ |
| D | index.rst | 367 - Data: 8 bits
369 - Stop bits: 1
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| /Zephyr-latest/doc/kernel/services/ |
| D | interrupts.rst | 716 When generating interrupts in the multi-level configuration, 8-bits per level is the default
720 number of bits per level. Regardless of how many bits used for each level, the sum of
721 the total bits used between all levels must sum to be less than or equal to 32-bits,
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| /Zephyr-latest/dts/arm/ambiq/ |
| D | ambiq_apollo4p_blue.dtsi | 414 arm,num-irq-priority-bits = <3>;
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| /Zephyr-latest/dts/arm/nuvoton/npcx/ |
| D | npcx7.dtsi | 9 /* NPCX7 series mapping table between MIWU wui bits and source device */
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| /Zephyr-latest/drivers/video/ |
| D | video_stm32_dcmi.c | 462 .enr = DT_INST_CLOCKS_CELL(0, bits),
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| /Zephyr-latest/boards/renesas/ek_ra8m1/doc/ |
| D | index.rst | 10 32-bits MCUs based on new Arm Cortex-M85. The kit offer multiple external interface
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| /Zephyr-latest/drivers/crypto/ |
| D | crypto_stm32.c | 560 .enr = DT_INST_CLOCKS_CELL(0, bits),
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| /Zephyr-latest/boards/snps/iotdk/doc/ |
| D | index.rst | 112 Data: 8 bits
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| /Zephyr-latest/dts/riscv/ |
| D | riscv32-litex-vexriscv.dtsi | 221 /* DNA data is 57-bits long,
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| /Zephyr-latest/dts/arm/st/l0/ |
| D | stm32l0.dtsi | 369 arm,num-irq-priority-bits = <2>;
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| /Zephyr-latest/dts/arm/renesas/ra/ |
| D | ra-cm4-common.dtsi | 354 arm,num-irq-priority-bits = <4>;
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| /Zephyr-latest/dts/arm/renesas/ra/ra4/ |
| D | ra4-cm4-common.dtsi | 415 arm,num-irq-priority-bits = <4>;
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| /Zephyr-latest/arch/posix/ |
| D | CMakeLists.txt | 60 # When building for 32bits x86, gcc defaults to using the old 8087 float arithmetic
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| /Zephyr-latest/dts/arm/st/f0/ |
| D | stm32f0.dtsi | 383 arm,num-irq-priority-bits = <2>;
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| /Zephyr-latest/drivers/flash/ |
| D | flash_nxp_s32_qspi_nor.c | 61 #define QSPI_IS_ALIGNED(addr, bits) (((addr) & BIT_MASK(bits)) == 0) argument
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| /Zephyr-latest/boards/st/b_u585i_iot02a/doc/ |
| D | index.rst | 111 - 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling
345 and ``RDP`` bits. ``TZEN`` needs to get set from 1 to 0 and ``RDP``,
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