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Searched refs:divCore (Results 1 – 25 of 65) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c105 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
122 .divCore = kSCG_SysClkDivBy5, /* Core clock divider. */
140 .divCore = kSCG_SysClkDivBy6, /* Core clock divider. */
156 .divCore = kSCG_SysClkDivBy3, /* Core clock divider. */
172 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
161 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
273 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
393 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.c79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
168 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
279 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
408 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/project_template/
Dclock_config.c79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
146 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
245 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
349 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/
Dclock_config.c79 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */ in CLOCK_CONFIG_FircSafeConfig()
143 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
243 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
351 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/
Dclock_config.c78 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
161 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
266 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/project_template/
Dclock_config.c77 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
165 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
277 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/
Dclock_config.c77 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
162 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
270 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/project_template/
Dclock_config.c77 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
158 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
260 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
157 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
258 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
157 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
258 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-ke15z/
Dclock_config.c72 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
144 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
248 .divCore = kSCG_SysClkDivBy2, /* Core Clock Divider: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
131 .divCore = kSCG_SysClkDivBy4, /* Core clock divider. */
147 .divCore = kSCG_SysClkDivBy2, /* Core clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c98 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
182 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
313 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
429 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
131 .divCore = kSCG_SysClkDivBy4, /* Core clock divider. */
147 .divCore = kSCG_SysClkDivBy2, /* Core clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c115 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
131 .divCore = kSCG_SysClkDivBy4, /* Core clock divider. */
147 .divCore = kSCG_SysClkDivBy2, /* Core clock divider. */
163 .divCore = kSCG_SysClkDivBy1, /* Core clock divider. */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/project_template/
Dclock_config.c99 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
199 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
310 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/project_template/
Dclock_config.c76 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
132 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/project_template/
Dclock_config.c75 .divCore = kSCG_SysClkDivBy1, /* Core clock divider */ in CLOCK_CONFIG_FircSafeConfig()
133 .divCore = kSCG_SysClkDivBy1, /* Core Clock Divider: divided by 1 */

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