/Zephyr-latest/dts/bindings/memory-controllers/ |
D | st,stm32h7-fmc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 The FMC allows to interface with static-memory mapped external devices such as 8 SRAM, NOR Flash, NAND Flash, SDRAM... 16 - NOR/PSRAM memory controller 17 - NAND memory controller (some devices also support PC Card) 18 - Synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) controller 27 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4...>; 30 compatible: "st,stm32h7-fmc" 32 include: ["st,stm32-fmc.yaml"] 35 st,mem-swap: [all …]
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D | st,stm32-fmc-sdram.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 STM32 Flexible Memory Controller (SDRAM controller). 7 The FMC SDRAM controller can be used to interface with external SDRAM 8 memories. Up to 2 SDRAM banks are supported with independent configuration. It 13 The FMC SDRAM controller is defined below the FMC node and SDRAM banks are 14 defined as child nodes of the FMC SDRAM node. You can either have bank 1 (@0), 15 bank 2 (@1) or both. You can enable the FMC SDRAM controller in your board 20 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4...>; 22 sdram { 25 power-up-delay = <100>; [all …]
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D | renesas,ra-sdram.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Renesas RA SDRAM controller. 6 sdram { 7 pinctrl-0 = <&sdram_default>; 8 pinctrl-names = "default"; 10 auto-refresh-interval = <10>; 11 auto-refresh-count = <8>; 12 precharge-cycle-count = <3>; 13 multiplex-addr-shift = "10-bit"; 14 edian-mode = "little-endian"; [all …]
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D | st,stm32-fmc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 The FMC allows to interface with static-memory mapped external devices such as 8 SRAM, NOR Flash, NAND Flash, SDRAM... 16 - NOR/PSRAM memory controller 17 - NAND memory controller (some devices also support PC Card) 18 - Synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) controller 27 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4...>; 30 compatible: "st,stm32-fmc" 32 include: [base.yaml, pinctrl-device.yaml] 41 pinctrl-0: [all …]
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/Zephyr-latest/boards/st/stm32f769i_disco/ |
D | stm32f769i_disco.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/f7/stm32f769nihx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 12 #include <zephyr/dt-bindings/input/input-event-codes.h> 16 compatible = "st,stm32f769I-disco"; 20 zephyr,shell-uart = &usart1; 21 zephyr,sram = &sram0; 24 zephyr,flash-controller = &mx25l51245g; 28 sdram1: sdram@c0000000 { [all …]
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/Zephyr-latest/boards/renesas/ek_ra8d1/ |
D | ek_ra8d1.dts | 3 * SPDX-License-Identifier: Apache-2.0 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input-event-codes.h> 11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 12 #include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h> 13 #include <zephyr/dt-bindings/adc/adc.h> 14 #include "ek_ra8d1-pinctrl.dtsi" 17 model = "Renesas EK-RA8D1"; 21 zephyr,sram = &sram0; [all …]
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/Zephyr-latest/boards/arduino/giga_r1/ |
D | arduino_giga_r1_stm32h747xx_m7.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h747xihx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 15 compatible = "arduino,giga-r1"; 19 zephyr,shell-uart = &usart1; 20 zephyr,uart-mcumgr = &usart1; 21 zephyr,bt-hci = &bt_hci_uart; 22 zephyr,sram = &sram0; 25 zephyr,code-partition = &slot0_partition; [all …]
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/Zephyr-latest/boards/st/stm32f746g_disco/ |
D | stm32f746g_disco.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/f7/stm32f746nghx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/input/input-event-codes.h> 12 #include <zephyr/dt-bindings/memory-attr/memory-attr.h> 13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 17 compatible = "st,stm32f746g-disco"; 21 zephyr,shell-uart = &usart1; 22 zephyr,sram = &sram0; 25 zephyr,flash-controller = &n25q128a1; [all …]
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/Zephyr-latest/boards/st/stm32f429i_disc1/ |
D | stm32f429i_disc1.dts | 5 * SPDX-License-Identifier: Apache-2.0 8 /dts-v1/; 10 #include <st/f4/stm32f429zitx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/display/ili9xxx.h> 12 #include <zephyr/dt-bindings/input/input-event-codes.h> 20 zephyr,shell-uart = &usart1; 21 zephyr,sram = &sram0; 28 sdram2: sdram@d0000000 { 29 compatible = "zephyr,memory-region", "mmio-sram"; 32 zephyr,memory-region = "SDRAM2"; [all …]
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/Zephyr-latest/boards/st/stm32f7508_dk/ |
D | stm32f7508_dk.dts | 5 * SPDX-License-Identifier: Apache-2.0 8 /dts-v1/; 10 #include <st/f7/stm32f750n8hx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 13 #include <zephyr/dt-bindings/input/input-event-codes.h> 16 model = "STMicroelectronics STM32F7508-DK"; 21 zephyr,shell-uart = &usart1; 22 zephyr,sram = &sram0; 25 zephyr,flash-controller = &n25q128a1; 31 compatible = "gpio-leds"; [all …]
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/Zephyr-latest/boards/st/stm32h750b_dk/ |
D | stm32h750b_dk.dts | 2 * Copyright (c) 2023-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h750xbhx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/input/input-event-codes.h> 15 compatible = "st,stm32h750b-dk"; 19 zephyr,shell-uart = &usart3; 20 zephyr,sram = &sram0; 22 zephyr,flash-controller = &mt25ql512ab1; 26 sdram2: sdram@d0000000 { [all …]
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/Zephyr-latest/boards/st/stm32h745i_disco/ |
D | stm32h745i_disco_stm32h745xx_m7.dts | 5 * SPDX-License-Identifier: Apache-2.0 8 /dts-v1/; 13 model = "STMicroelectronics STM32H745I-DISCO board"; 14 compatible = "st,stm32h745i-disco"; 19 zephyr,shell-uart = &usart3; 21 zephyr,sram = &sram0; 23 zephyr,flash-controller = &mt25ql512ab1; 28 compatible = "pwm-leds"; 32 label = "User LD8 - PWM11"; 36 /* RM0455 - 23.6 External device address mapping */ [all …]
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/Zephyr-latest/boards/st/stm32h7b3i_dk/ |
D | stm32h7b3i_dk.dts | 2 * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com> 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 12 #include <zephyr/dt-bindings/input/input-event-codes.h> 16 compatible = "st,stm32h7b3i-dk"; 20 zephyr,shell-uart = &usart1; 21 zephyr,sram = &sram0; 29 compatible = "gpio-leds"; [all …]
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/Zephyr-latest/boards/st/stm32h747i_disco/ |
D | stm32h747i_disco_stm32h747xx_m7.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h747xihx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> 15 compatible = "st,stm32h747i-disco"; 20 zephyr,shell-uart = &usart1; 21 zephyr,sram = &sram0; 23 zephyr,flash-controller = &mt25ql512ab1; 26 sdram2: sdram@d0000000 { 27 compatible = "zephyr,memory-region", "mmio-sram"; [all …]
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/Zephyr-latest/dts/arm/st/f4/ |
D | stm32f446.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 8 #include <zephyr/dt-bindings/clock/stm32f410_clock.h> 9 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-sdram.h> 14 compatible = "st,stm32f411-plli2s-clock"; 19 compatible = "st,stm32f446", "st,stm32f4", "simple-bus"; 22 compatible = "st,stm32-i2s"; 23 #address-cells = <1>; 24 #size-cells = <0>; 30 dma-names = "tx", "rx"; 35 compatible = "st,stm32-usart", "st,stm32-uart"; [all …]
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/Zephyr-latest/boards/witte/linum/ |
D | linum.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h753bitx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/input/input-event-codes.h> 18 zephyr,shell-uart = &usart1; 19 zephyr,sram = &sram0; 22 zephyr,code-partition = &slot0_partition; 26 sdram1: sdram@c0000000 { 27 compatible = "zephyr,memory-region", "mmio-sram"; 30 zephyr,memory-region = "SDRAM1"; [all …]
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/Zephyr-latest/boards/arduino/portenta_h7/ |
D | arduino_portenta_h7_stm32h747xx_m7.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/h7/stm32h747xihx-pinctrl.dtsi> 10 #include "arduino_portenta_h7-common.dtsi" 15 compatible = "arduino,portenta-h7"; 19 zephyr,sram = &sram0; 21 zephyr,code-partition = &slot0_partition; 25 compatible = "regulator-fixed"; 26 regulator-name = "oscen"; 27 enable-gpios = <&gpioh 1 GPIO_ACTIVE_HIGH>; [all …]
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/Zephyr-latest/drivers/memc/ |
D | memc_stm32.c | 4 * SPDX-License-Identifier: Apache-2.0 41 const struct memc_stm32_config *config = dev->config; in memc_stm32_init() 47 r = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in memc_stm32_init() 58 return -ENODEV; in memc_stm32_init() 61 r = clock_control_on(clk, (clock_control_subsys_t)&config->pclken[0]); in memc_stm32_init() 67 if (IS_ENABLED(STM32_FMC_DOMAIN_CLOCK_SUPPORT) && (config->pclk_len > 1)) { in memc_stm32_init() 69 r = clock_control_configure(clk, (clock_control_subsys_t)&config->pclken[1], NULL); in memc_stm32_init() 78 /* sdram-sram */ in memc_stm32_init() 79 MODIFY_REG(FMC_Bank1_R->BTCR[0], FMC_BCR1_BMAP, FMC_BCR1_BMAP_0); in memc_stm32_init() 82 MODIFY_REG(FMC_Bank1_R->BTCR[0], FMC_BCR1_BMAP, FMC_BCR1_BMAP_1); in memc_stm32_init()
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D | memc_stm32_nor_psram.c | 4 * SPDX-License-Identifier: Apache-2.0 16 /** SRAM base register offset, see FMC_Bank1_R_BASE */ 18 /** SRAM extended mode register offset, see FMC_Bank1E_R_BASE */ 42 hnor.Instance = config->nor_psram; in memc_stm32_nor_init() 43 hnor.Extended = config->extended; in memc_stm32_nor_init() 45 memcpy(&hnor.Init, &bank_config->init, sizeof(hnor.Init)); in memc_stm32_nor_init() 47 if (bank_config->init.ExtendedMode == FMC_EXTENDED_MODE_ENABLE) { in memc_stm32_nor_init() 48 ext_timing = (FMC_NORSRAM_TimingTypeDef *)&bank_config->timing_ext; in memc_stm32_nor_init() 54 (FMC_NORSRAM_TimingTypeDef *)&bank_config->timing, in memc_stm32_nor_init() 56 return -ENODEV; in memc_stm32_nor_init() [all …]
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/Zephyr-latest/boards/gd/gd32f450i_eval/doc/ |
D | index.rst | 6 The GD32F450I-EVAL board is a hardware platform that enables prototyping 7 on GD32F450IK Cortex-M4F Stretch Performance MCU. 9 The GD32F450IK features a single-core ARM Cortex-M4F MCU which can run up 11 SRAM and 140 GPIOs. 16 - GD32F450IKT6 MCU 17 - AT24C02C 2Kb EEPROM 18 - GD25Q32C 16Mbit SPI and QSPI NOR Flash 19 - GD9FS1G8F2A 1Gbit NAND Flash 20 - Micron MT48LC16M16A2P-6AIT 256Mbit SDRAM 21 - 3 x User LEDs [all …]
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/Zephyr-latest/boards/gd/gd32f450z_eval/doc/ |
D | index.rst | 6 The GD32F450Z-EVAL board is a hardware platform that enables prototyping 7 on GD32F450ZK Cortex-M4F Stretch Performance MCU. 9 The GD32F450ZK features a single-core ARM Cortex-M4F MCU which can run up 11 SRAM and 114 GPIOs. 16 - GD32F450ZKT6 MCU 17 - AT24C02C 2Kb EEPROM 18 - GD25Q16B 16Mbit SPI and QSPI NOR Flash 19 - Micron MT48LC16M16A2P-6AIT 256Mbit SDRAM 20 - 3 x User LEDs 21 - 3 x User Push buttons [all …]
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/Zephyr-latest/boards/gd/gd32f470i_eval/doc/ |
D | index.rst | 6 The GD32F470I-EVAL board is a hardware platform that enables prototyping 7 on GD32F470IK Cortex-M4F Stretch Performance MCU. 9 The GD32F470IK features a single-core ARM Cortex-M4F MCU which can run up 11 SRAM and 140 GPIOs. 16 - GD32F470IKH6 MCU 17 - 2Kb EEPROM 18 - 16Mbit SPI and QSPI NOR Flash 19 - 256Mbit SDRAM 20 - 3 x User LEDs 21 - 3 x User Push buttons [all …]
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/Zephyr-latest/boards/gd/gd32e507z_eval/doc/ |
D | index.rst | 6 The GD32E507Z-EVAL board is a hardware platform that enables prototyping 7 on GD32E507ZE Cortex-M33 High Performance MCU. 9 The GD32E507ZE features a single-core ARM Cortex-M33 MCU which can run up 11 SRAM and 112 GPIOs. 16 - GD32E507ZET6 MCU 17 - AT24C02C 2Kb EEPROM 18 - GD25Q16 16Mbit SPI and QSPI NOR Flash 19 - GD9FU1G8F2A 1Gbit NAND Flash 20 - Micron MT48LC16M16A2P-6AIT 256Mbit SDRAM 21 - 4 x User LEDs [all …]
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/Zephyr-latest/boards/st/stm32h7b3i_dk/doc/ |
D | index.rst | 6 The STM32H7B3I-DK Discovery kit is a complete demonstration and development 7 platform for STMicroelectronics Arm® Cortex®-M7 core-based STM32H7B3LIH6QU 10 The STM32H7B3I-DK Discovery kit is used as a reference design for user 17 camera, SDRAM, Octo-SPI Flash memory and RGB interface LCD with capacitive touch 23 - STM32H7B3LIH6Q microcontroller featuring 2 Mbytes of Flash memory and 1.4 Mbyte of RAM in BGA225 … 24 - 4.3" (480x272 pixels) TFT color LCD module including a capacitive touch panel with RGB interface 25 - Wi-Fi |reg| module compliant with 802.11 b/g/n 26 - USB OTG HS 27 - Audio codec 28 - 512-Mbit Octo-SPI NOR Flash memory [all …]
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/Zephyr-latest/boards/st/nucleo_h563zi/doc/ |
D | index.rst | 7 STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H563ZIT6 11 - STM32H563ZI microcontroller featuring 2 Mbytes of Flash memory and 640Kbyte of 12 SRAM in LQFP144 package 13 - Board connectors: 15 - USB Type-C |trade| Sink device FS 16 - Ethernet RJ45 connector compliant with IEEE-802.3-2002 (depending on STM32 support) 17 - ST Zio expansion connector including Arduino Uno V3 connectivity (CN7, CN8, CN9, CN10) 18 - ST morpho extension connector (CN11, CN12) 20 - Flexible board power supply: 22 - 5V_USB_STLK from ST-Link USB connector [all …]
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