1.. zephyr:board:: nucleo_h563zi 2 3Overview 4******** 5 6The Nucleo H563ZI board is designed as an affordable development platform for 7STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H563ZIT6 8microcontroller with TrustZone |reg|. 9Here are some highlights of the Nucleo H563ZI board: 10 11- STM32H563ZI microcontroller featuring 2 Mbytes of Flash memory and 640Kbyte of 12 SRAM in LQFP144 package 13- Board connectors: 14 15 - USB Type-C |trade| Sink device FS 16 - Ethernet RJ45 connector compliant with IEEE-802.3-2002 (depending on STM32 support) 17 - ST Zio expansion connector including Arduino Uno V3 connectivity (CN7, CN8, CN9, CN10) 18 - ST morpho extension connector (CN11, CN12) 19 20- Flexible board power supply: 21 22 - 5V_USB_STLK from ST-Link USB connector 23 - VIN (7 - 12V, 0.8A) supplied via pin header CN8 pin 15 or CN11 pin 24 24 - 5V_EXT on the ST morpho connector CN11 Pin 6 (5V, 1.3) 25 - CHGR from a USB charger via the ST-LINK USB connector 26 - USB_USER from the USB user connector (5V, 3A) 27 - 3V3_EXT supplied via a pin header CN8 pin 7 or CN11 pin 16 (3.3V, 1.3A) 28 29- On-board ST-LINK/V3EC debugger/programmer 30 31 - mass storage 32 - Virtual COM port 33 - debug port 34 35- Three users LEDs 36- Two push-buttons: USER and RESET 37- 32.789 kHz crystal oscillator 38 39More information about the board can be found at the `NUCLEO_H563ZI website`_. 40 41Hardware 42******** 43 44The STM32H563xx devices are high-performance microcontrollers from the STM32H5 45Series based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core. 46They operate at a frequency of up to 250 MHz. 47 48- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. 49- Performance benchmark: 50 51 - 375 DMPIS/MHz (Dhrystone 2.1) 52 53- Security 54 55 - Arm |reg| TrustZone |reg| with ARMv8-M mainline security extension 56 - Up to 8 configurable SAU regions 57 - TrustZone |reg| aware and securable peripherals 58 - Flexible lifecycle scheme with secure debug authentication 59 - SFI (secure firmware installation) 60 - Secure firmware upgrade support with TF-M 61 - HASH hardware accelerator 62 - True random number generator, NIST SP800-90B compliant 63 - 96-bit unique ID 64 - Active tampers 65 66- Clock management: 67 68 - 25 MHz crystal oscillator (HSE) 69 - 32 kHz crystal oscillator for RTC (LSE) 70 - Internal 64 MHz (HSI) trimmable by software 71 - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%) 72 - Internal 4 MHz oscillator (CSI), trimmable by software 73 - Internal 48 MHz (HSI48) with recovery system 74 - 3 PLLs for system clock, USB, audio, ADC 75 76- Power management 77 78 - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry 79 - Embedded SMPS step-down converter 80 81- RTC with HW calendar, alarms and calibration 82- Up to 139 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V 83- Up to 16 timers and 2 watchdogs 84 85 - 12x 16-bit 86 - 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 87 - 6x 16-bit low-power 16-bit timers (available in Stop mode) 88 - 2x watchdogs 89 - 2x SysTick timer 90 91- Memories 92 93 - Up to 2 MB Flash, 2 banks read-while-write 94 - 1 Kbyte OTP (one-time programmable) 95 - 640 KB of SRAM including 64 KB with hardware parity check and 320 Kbytes with flexible ECC 96 - 4 Kbytes of backup SRAM available in the lowest power modes 97 - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories 98 - 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats 99 - 2x SD/SDIO/MMC interfaces 100 101- Rich analog peripherals (independent supply) 102 103 - 2x 12-bit ADC with up to 5 MSPS in 12-bit 104 - 1x 12-bit D/A with 2 channels 105 - 1x Digital temperature sensor 106 107- 34x communication interfaces 108 109 - 1x USB Type-C / USB power-delivery controller 110 - 1x USB 2.0 full-speed host and device 111 - 4x I2C FM+ interfaces (SMBus/PMBus) 112 - 1x I3C interface 113 - 12x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) 114 - 1x LP UART 115 - 6x SPIs including 3 muxed with full-duplex I2S 116 - 5x additional SPI from 5x USART when configured in Synchronous mode 117 - 2x SAI 118 - 2x FDCAN 119 - 1x SDMMC interface 120 - 2x 16 channel DMA controllers 121 - 1x 8- to 14- bit camera interface 122 - 1x HDMI-CEC 123 - 1x Ethernel MAC interface with DMA controller 124 - 1x 16-bit parallel slave synchronous-interface 125 126- CORDIC for trigonometric functions acceleration 127- FMAC (filter mathematical accelerator) 128- CRC calculation unit 129- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| 130 131More information about STM32H563ZI can be found here: 132 133- `STM32H563ZI on www.st.com`_ 134- `STM32H563 reference manual`_ 135 136Supported Features 137================== 138 139The Zephyr nucleo_h563zi board configuration supports the following hardware features: 140 141+-----------+------------+-------------------------------------+ 142| Interface | Controller | Driver/Component | 143+===========+============+=====================================+ 144| ADC | on-chip | ADC Controller | 145+-----------+------------+-------------------------------------+ 146| BKP SRAM | on-chip | Backup SRAM | 147+-----------+------------+-------------------------------------+ 148| CAN/CANFD | on-chip | CAN | 149+-----------+------------+-------------------------------------+ 150| CLOCK | on-chip | reset and clock control | 151+-----------+------------+-------------------------------------+ 152| DAC | on-chip | DAC Controller | 153+-----------+------------+-------------------------------------+ 154| GPIO | on-chip | gpio | 155+-----------+------------+-------------------------------------+ 156| NVIC | on-chip | nested vector interrupt controller | 157+-----------+------------+-------------------------------------+ 158| PINMUX | on-chip | pinmux | 159+-----------+------------+-------------------------------------+ 160| PWM | on-chip | PWM | 161+-----------+------------+-------------------------------------+ 162| RNG | on-chip | True Random number generator | 163+-----------+------------+-------------------------------------+ 164| RTC | on-chip | Real Time Clock | 165+-----------+------------+-------------------------------------+ 166| SPI | on-chip | spi bus | 167+-----------+------------+-------------------------------------+ 168| I2C | on-chip | i2c bus | 169+-----------+------------+-------------------------------------+ 170| I3C | on-chip | i3c bus | 171+-----------+------------+-------------------------------------+ 172| UART | on-chip | serial port-polling; | 173| | | serial port-interrupt | 174+-----------+------------+-------------------------------------+ 175| WATCHDOG | on-chip | independent watchdog | 176+-----------+------------+-------------------------------------+ 177| USB | on-chip | USB full-speed host/device bus | 178+-----------+------------+-------------------------------------+ 179| ETHERNET | on-chip | ethernet | 180+-----------+------------+-------------------------------------+ 181 182Other hardware features are not yet supported on this Zephyr port. 183 184The default configuration can be found in the defconfig and dts files: 185 186- Secure target: 187 188 - :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi_defconfig` 189 - :zephyr_file:`boards/st/nucleo_h563zi/nucleo_h563zi.dts` 190 191Zephyr board options 192==================== 193 194The STM32H563 is an SoC with Cortex-M33 architecture. Zephyr provides support 195for building for Secure firmware. 196 197The BOARD options are summarized below: 198 199+----------------------+-----------------------------------------------+ 200| BOARD | Description | 201+======================+===============================================+ 202| nucleo_h563zi | For building Secure firmware | 203+----------------------+-----------------------------------------------+ 204 205Connections and IOs 206=================== 207 208Nucleo H563ZI Board has 9 GPIO controllers. These controllers are responsible for pin muxing, 209input/output, pull-up, etc. 210 211For more details please refer to `STM32H5 Nucleo-144 board User Manual`_. 212 213Default Zephyr Peripheral Mapping: 214---------------------------------- 215 216- ADC1 channel 3 input: PA6 217- ADC1 channel 15 input: PA3 218- DAC1 channel 2 output: PA5 219- CAN/CANFD TX/RX: PD1/PD0 220- LD1 (green): PB0 221- LD2 (yellow): PF4 222- LD3 (red): PG4 223- LPUART1 TX/RX : PB6/PB7 (Arduino LPUART1) 224- SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14 225- UART3 TX/RX : PD8/PD9 (VCP) 226- USER_PB : PC13 227- I3C1: PD12(SCL) & PD13(SDA) 228 229System Clock 230------------ 231 232Nucleo H563ZI System Clock could be driven by internal or external oscillator, 233as well as main PLL clock. By default System clock is driven by PLL clock at 234240MHz, driven by 8MHz external clock provided from the STLINK-V3EC. 235 236Serial Port 237----------- 238 239Nucleo H563ZI board has up to 12 U(S)ARTs. The Zephyr console output is assigned 240to USART3. Default settings are 115200 8N1. 241 242Backup SRAM 243----------- 244 245In order to test backup SRAM, you may want to disconnect VBAT from VDD_MCU. 246You can do it by removing ``SB55`` jumper on the back side of the board. 247VBAT can be provided via the left ST Morpho connector's pin 33. 248 249Programming and Debugging 250************************* 251 252Nucleo H563ZI board includes an ST-LINK/V3EC embedded debug tool interface. 253This probe allows to flash the board using various tools. 254 255Applications for the ``nucleo_h563zi`` board can be built and 256flashed in the usual way (see :ref:`build_an_application` and 257:ref:`application_run` for more details). 258 259OpenOCD Support 260=============== 261 262For now, openocd support for stm32h5 is not available on upstream OpenOCD. 263You can check `OpenOCD official Github mirror`_. 264In order to use it though, you should clone from the cutomized 265`STMicroelectronics OpenOCD Github`_ and compile it following usual README guidelines. 266Once it is done, you can set the OPENOCD and OPENOCD_DEFAULT_PATH variables in 267:zephyr_file:`boards/st/nucleo_h563zi/board.cmake` to point the build 268to the paths of the OpenOCD binary and its scripts, before 269including the common openocd.board.cmake file: 270 271 .. code-block:: none 272 273 set(OPENOCD "<path_to_openocd_repo>/src/openocd" CACHE FILEPATH "" FORCE) 274 set(OPENOCD_DEFAULT_PATH <path_to_opneocd_repo>/tcl) 275 include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) 276 277 278Flashing 279======== 280 281The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, 282so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required. 283 284Alternatively, OpenOCD, JLink, or pyOCD can also be used to flash the board using 285the ``--runner`` (or ``-r``) option: 286 287.. code-block:: console 288 289 $ west flash --runner openocd 290 $ west flash --runner pyocd 291 $ west flash --runner jlink 292 293For pyOCD, additional target information needs to be installed. 294This can be done by executing the following commands. 295 296.. code-block:: console 297 298 $ pyocd pack --update 299 $ pyocd pack --install stm32h5 300 301 302Flashing an application to Nucleo H563ZI 303---------------------------------------- 304 305Connect the Nucleo H563ZI to your host computer using the USB port. 306Then build and flash an application. Here is an example for the 307:zephyr:code-sample:`hello_world` application. 308 309Run a serial host program to connect with your Nucleo board: 310 311.. code-block:: console 312 313 $ minicom -D /dev/ttyACM0 314 315Then build and flash the application. 316 317.. zephyr-app-commands:: 318 :zephyr-app: samples/hello_world 319 :board: nucleo_h563zi 320 :goals: build flash 321 322You should see the following message on the console: 323 324.. code-block:: console 325 326 Hello World! nucleo_h563zi 327 328Debugging 329========= 330 331You can debug an application in the usual way. Here is an example for the 332:zephyr:code-sample:`blinky` application. 333 334.. zephyr-app-commands:: 335 :zephyr-app: samples/basic/blinky 336 :board: nucleo_h563zi 337 :goals: debug 338 339.. _NUCLEO_H563ZI website: 340 https://www.st.com/en/evaluation-tools/nucleo-h563zi 341 342.. _STM32H5 Nucleo-144 board User Manual: 343 https://www.st.com/resource/en/user_manual/um3115-stm32h5-nucleo144-board-mb1404-stmicroelectronics.pdf 344 345.. _STM32H563ZI on www.st.com: 346 https://www.st.com/en/microcontrollers/stm32h563zi.html 347 348.. _STM32H563 reference manual: 349 https://www.st.com/resource/en/reference_manual/rm0481-stm32h563h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf 350 351.. _STM32CubeProgrammer: 352 https://www.st.com/en/development-tools/stm32cubeprog.html 353 354.. _OpenOCD official Github mirror: 355 https://github.com/openocd-org/openocd/ 356 357.. _STMicroelectronics OpenOCD Github: 358 https://github.com/STMicroelectronics/OpenOCD/tree/openocd-cubeide-r6 359
