1/*
2 * Copyright (c) 2024 Renesas Electronics Corporation
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/dts-v1/;
7
8#include <renesas/ra/ra8/r7fa8d1bhecbd.dtsi>
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input-event-codes.h>
11#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12#include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>
13#include <zephyr/dt-bindings/adc/adc.h>
14#include "ek_ra8d1-pinctrl.dtsi"
15
16/ {
17	model = "Renesas EK-RA8D1";
18	compatible = "renesas,ra8d1", "renesas,ra8";
19
20	chosen {
21		zephyr,sram = &sram0;
22		zephyr,flash = &flash0;
23		zephyr,console = &uart9;
24		zephyr,shell-uart = &uart9;
25		zephyr,entropy = &trng;
26		zephyr,flash-controller = &flash1;
27		zephyr,canbus = &canfd0;
28	};
29
30	leds {
31		compatible = "gpio-leds";
32		led1: led1 {
33			gpios = <&ioport6 0 GPIO_ACTIVE_HIGH>;
34			label = "LED1";
35		};
36		led2: led2 {
37			gpios = <&ioport4 14 GPIO_ACTIVE_HIGH>;
38			label = "LED2";
39		};
40		led3: led3 {
41			gpios = <&ioport1 7 GPIO_ACTIVE_HIGH>;
42			label = "LED3";
43		};
44	};
45
46	buttons {
47		compatible = "gpio-keys";
48		button0: s1 {
49			gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
50			label = "Push button switch 1";
51			zephyr,code = <INPUT_KEY_0>;
52		};
53		button1: s2 {
54			gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
55			label = "Push button switch 2";
56			zephyr,code = <INPUT_KEY_1>;
57		};
58	};
59
60	sdram1: sdram@68000000 {
61		compatible = "zephyr,memory-region", "mmio-sram";
62		device_type = "memory";
63		reg = <0x68000000 DT_SIZE_M(64)>;	/* 512 Mbits */
64		zephyr,memory-region = "SDRAM";
65		status = "okay";
66	};
67
68	renesas_mipi_connector: mipi-connector {
69		compatible = "renesas,ra-gpio-mipi-header";
70		#gpio-cells = <2>;
71		gpio-map-mask = <0xffffffff 0xffffffc0>;
72		gpio-map-pass-thru = <0 0x3f>;
73		gpio-map =	<14 0 &ioport5 11 0>,	/* IIC_SDA */
74				<15 0 &ioport4 4 0>,	/* DISP_BLEN */
75				<16 0 &ioport5 12 0>,	/* IIC_SCL */
76				<17 0 &ioport5 10 0>,	/* DISP_INT */
77				<18 0 &ioporta 1 0>;	/* DISP_RST */
78	};
79
80	aliases {
81		led0 = &led1;
82		sw0 = &button0;
83		sw1 = &button1;
84		mipi-dsi = &mipi_dsi;
85	};
86};
87
88&xtal {
89	clock-frequency = <DT_FREQ_M(20)>;
90	mosel = <0>;
91	#clock-cells = <0>;
92	status = "okay";
93};
94
95&subclk {
96	status = "okay";
97};
98
99&pll {
100	status = "okay";
101	pllp {
102		status = "okay";
103	};
104
105	pllq {
106		status = "okay";
107	};
108
109	pllr {
110		status = "okay";
111	};
112};
113
114
115&sciclk {
116	clocks = <&pllp>;
117	div = <4>;
118	status = "okay";
119};
120
121&canfdclk {
122	clocks = <&pll>;
123	div = <5>;
124	status = "okay";
125};
126
127&lcdclk {
128	clocks = <&pll>;
129	div = <2>;
130	status = "okay";
131};
132
133&ioport0 {
134	status = "okay";
135};
136
137&ioport1 {
138	status = "okay";
139};
140
141&ioport4 {
142	status = "okay";
143};
144
145&ioport5 {
146	status = "okay";
147};
148
149&ioport6 {
150	status = "okay";
151};
152
153&ioporta {
154	status = "okay";
155};
156
157&sci0 {
158	/* sci0 and spi0 cannot be enabled together */
159	pinctrl-0 = <&sci9_default>;
160	pinctrl-names = "default";
161};
162
163&sci9 {
164	pinctrl-0 = <&sci9_default>;
165	pinctrl-names = "default";
166	status = "okay";
167	uart9: uart {
168		current-speed = <115200>;
169		status = "okay";
170	};
171};
172
173&trng {
174	status = "okay";
175};
176
177&spi0 {
178	pinctrl-0 = <&spi0_default>;
179	pinctrl-names = "default";
180	status = "okay";
181};
182
183&flash1 {
184	partitions {
185		compatible = "fixed-partitions";
186		#address-cells = <1>;
187		#size-cells = <1>;
188
189		storage_partition: partition@0 {
190			label = "storage";
191			reg = <0X0 DT_SIZE_K(12)>;
192		};
193	};
194};
195
196&pwm7 {
197	pinctrl-0 = <&pwm7_default>;
198	interrupts = <40 1>, <41 1>;
199	interrupt-names = "gtioca", "overflow";
200	pinctrl-names = "default";
201	status = "okay";
202};
203
204&canfd_global {
205	status = "okay";
206	canfd0 {
207		pinctrl-0 = <&canfd0_default>;
208		pinctrl-names = "default";
209		rx-max-filters = <16>;
210		status = "okay";
211	};
212};
213
214&iic1 {
215	#address-cells = <1>;
216	#size-cells = <0>;
217	clock-frequency = <DT_FREQ_M(1)>;
218	pinctrl-0 = <&iic1_default>;
219	pinctrl-names = "default";
220};
221
222&eth {
223	local-mac-address = [74 90 50 B0 5D E9];
224	status = "okay";
225	phy-handle = <&phy>;
226};
227
228&mdio {
229	pinctrl-0 = <&ether_default>;
230	pinctrl-names = "default";
231	status = "okay";
232
233	phy: ethernet-phy@5 {
234		compatible = "ethernet-phy";
235		reg = <5>;
236		status = "okay";
237	};
238};
239
240&usbhs {
241	pinctrl-0 = <&usbhs_default>;
242	pinctrl-names = "default";
243	maximum-speed = "high-speed";
244	status = "okay";
245	zephyr_udc0: udc {
246		status = "okay";
247	};
248};
249
250&usbhs_phy {
251	phys-clock-src = "xtal";
252};
253
254&adc0 {
255	status = "okay";
256	pinctrl-0 = <&adc0_default>;
257	pinctrl-names = "default";
258};
259
260&port_irq12 {
261	interrupts = <88 12>;
262	status = "okay";
263};
264
265&port_irq13 {
266	interrupts = <89 12>;
267	status = "okay";
268};
269
270&sdram {
271	pinctrl-0 = <&sdram_default>;
272	pinctrl-names = "default";
273	status = "okay";
274	auto-refresh-interval = <SDRAM_AUTO_REFREDSH_INTERVEL_10CYCLES>;
275	auto-refresh-count = <SDRAM_AUTO_REFREDSH_COUNT_8TIMES>;
276	precharge-cycle-count = <SDRAM_AUTO_PRECHARGE_CYCLE_3CYCLES>;
277	multiplex-addr-shift = "10-bit";
278	edian-mode = "little-endian";
279	continuous-access;
280	bus-width = "16-bit";
281	bank@0 {
282		reg = <0>;
283		renesas,ra-sdram-timing = <SDRAM_TRAS_6CYCLES
284		SDRAM_TRCD_3CYCLES
285		SDRAM_TRP_3CYCLES
286		SDRAM_TWR_2CYCLES
287		SDRAM_TCL_3CYCLES
288		937
289		SDRAM_TREFW_8CYCLES>;
290	};
291};
292
293zephyr_lcdif: &lcdif {
294	pinctrl-0 = <&glcdc_default>;
295	pinctrl-names = "default";
296};
297
298zephyr_mipi_dsi: &mipi_dsi {};
299
300renesas_mipi_i2c: &iic1{};
301
302pmod_sd_shield: &sdhc1 {};
303