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/Zephyr-latest/dts/bindings/gpio/
Dnordic,nrf-gpiote.yaml1 # Copyright (c) 2018, marc-cpdesign
2 # SPDX-License-Identifier: Apache-2.0
4 description: NRF5 GPIOTE node
6 compatible: "nordic,nrf-gpiote"
9 - base.yaml
10 - nordic,split-channels.yaml
19 instance:
23 The GPIOTE instance number. GPIOTE instance GPIOTE0 has:
25 instance = <0>;
29 instance = <1>;
Dnordic,nrf-gpio.yaml1 # Copyright (c) 2018, marc-cpdesign
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nordic,nrf-gpio"
8 include: [gpio-controller.yaml, base.yaml]
14 gpiote-instance:
17 GPIOTE instance that can be used with this GPIO port.
19 "#gpio-cells":
22 sense-edge-mask:
26 Pins not included in the mask use GPIOTE channels in the event mode.
40 gpio-cells:
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/Zephyr-latest/dts/arm/nordic/
Dnrf5340_cpuapp.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-m33f";
20 #address-cells = <1>;
21 #size-cells = <1>;
24 compatible = "arm,armv8m-itm";
26 swo-ref-frequency = <64000000>;
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Dnrf91.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-m33f";
20 #address-cells = <1>;
21 #size-cells = <1>;
24 compatible = "arm,armv8m-mpu";
31 zephyr,flash-controller = &flash_controller;
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Dnrf91ns.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
18 compatible = "arm,cortex-m33f";
20 #address-cells = <1>;
21 #size-cells = <1>;
24 compatible = "arm,armv8m-mpu";
32 zephyr,flash-controller = &flash_controller;
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Dnrf5340_cpuappns.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* .dtsi header for nRF5340 CPUAPP (Application MCU), Non-Secure domain */
9 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m33f";
22 #address-cells = <1>;
23 #size-cells = <1>;
26 compatible = "arm,armv8m-mpu";
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Dnrf5340_cpunet.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
12 zephyr,bt-hci = &bt_hci_controller;
14 zephyr,flash-controller = &flash_controller;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-m33";
25 #address-cells = <1>;
26 #size-cells = <1>;
29 compatible = "arm,armv8m-mpu";
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Dnrf51822.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv6-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-adc.h>
9 zephyr,bt-hci = &bt_hci_controller;
11 zephyr,flash-controller = &flash_controller;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m0";
27 compatible = "nordic,nrf-ficr";
29 #nordic,ficr-cells = <1>;
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Dnrf52805.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
32 compatible = "nordic,nrf-ficr";
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Dnrf52810.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4";
23 #address-cells = <1>;
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Dnrf52840.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4f";
23 #address-cells = <1>;
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Dnrf52833.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4f";
27 #address-cells = <1>;
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Dnrf52820.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
27 #address-cells = <1>;
28 #size-cells = <1>;
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Dnrf52811.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
14 zephyr,bt-hci = &bt_hci_controller;
16 zephyr,flash-controller = &flash_controller;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-m4";
27 #address-cells = <1>;
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Dnrf52832.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
5 #include <zephyr/dt-bindings/adc/nrf-saadc-v2.h>
6 #include <zephyr/dt-bindings/regulator/nrf5x.h>
10 zephyr,bt-hci = &bt_hci_controller;
12 zephyr,flash-controller = &flash_controller;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-m4f";
23 #address-cells = <1>;
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/Zephyr-latest/samples/boards/nordic/nrfx/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
20 #define GPIOTE_NODE DT_NODELABEL(_CONCAT(gpiote, GPIOTE_INST))
23 "Both sw0 and led0 GPIOs must use the same GPIOTE instance");
42 const nrfx_gpiote_t gpiote = NRFX_GPIOTE_INSTANCE(GPIOTE_INST); in main() local
44 /* Connect GPIOTE instance IRQ to irq handler */ in main()
48 /* Initialize GPIOTE (the interrupt priority passed as the parameter in main()
51 err = nrfx_gpiote_init(&gpiote, 0); in main()
57 err = nrfx_gpiote_channel_alloc(&gpiote, &in_channel); in main()
63 err = nrfx_gpiote_channel_alloc(&gpiote, &out_channel); in main()
86 err = nrfx_gpiote_input_configure(&gpiote, INPUT_PIN, &input_config); in main()
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/Zephyr-latest/soc/nordic/common/
Dsoc_nrf_common.h3 * SPDX-License-Identifier: Apache-2.0
19 * @brief Get a PSEL value out of a foo-gpios or foo-pin devicetree property
21 * Many Nordic bindings have 'foo-pin' properties to specify a pin
22 * configuration as a PSEL value directly instead of using a 'foo-gpios'
25 * It would be better to use 'foo-gpios' properties instead. This type
28 * To allow for a smooth migration from 'foo-pin' to 'foo-gpios', this
30 * using whichever one of 'foo-gpios' or 'foo-pin' is in the DTS.
34 * - NRF_DT_PSEL_CHECK_*() to check the property configuration at build time
35 * - NRF_DT_GPIOS_TO_PSEL() if you only have a 'foo-gpios'
38 * @param psel_prop lowercase-and-underscores old-style 'foo-pin' property
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/Zephyr-latest/dts/bindings/display/
Dnordic,nrf-led-matrix.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nordic,nrf-led-matrix"
8 include: display-controller.yaml
11 row-gpios:
12 type: phandle-array
17 col-gpios:
18 type: phandle-array
23 pixel-mapping:
24 type: uint8-array
36 pixel-mapping = [00 13 01 14 02
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/Zephyr-latest/drivers/display/
DKconfig.nrf_led_matrix2 # SPDX-License-Identifier: Apache-2.0
15 to pixels are specified in properties of a "nordic,nrf-led-matrix"
17 The driver uses one TIMER instance and, depending on what is set in
18 devicetree, one PWM instance or one or more GPIOTE and PPI channels
19 (the latter value depends on the chosen pixel group size - the number
Ddisplay_nrf_led_matrix.c4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/gpio/gpio.h>
31 #if (GROUP_SIZE > DT_PROP(TIMER_NODE, cc_num) - 1) || \
33 #error "Invalid pixel-group-size configured."
40 #error "Invalid length of pixel-mapping."
48 _GET_ROW_IDX(dev_config->pixel_mapping[pixel_idx])
54 _GET_COL_IDX(dev_config->pixel_mapping[pixel_idx])
59 "Invalid row index in pixel-mapping["#idx"]."); \
61 "Invalid column index in pixel-mapping["#idx"].");
77 #error "Invalid pixel period. Change refresh-frequency or pixel-group-size."
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/Zephyr-latest/drivers/gpio/
Dgpio_nrfx.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
33 nrfx_gpiote_t gpiote; member
41 return port->data; in get_port_data()
46 return port->config; in get_port_cfg()
51 return cfg->gpiote.p_reg != NULL; in has_gpiote()
70 if (cfg->pad_pd == NRF_GPD_FAST_ACTIVE1) { in gpio_nrfx_gpd_retain_set()
74 nrf_gpio_port_retain_enable(cfg->port, mask); in gpio_nrfx_gpd_retain_set()
96 if (cfg->pad_pd == NRF_GPD_FAST_ACTIVE1) { in gpio_nrfx_gpd_retain_clear()
104 nrf_gpio_port_retain_disable(cfg->port, mask); in gpio_nrfx_gpd_retain_clear()
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/Zephyr-latest/drivers/spi/
DKconfig.nrfx1 # Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
2 # SPDX-License-Identifier: Apache-2.0
81 'anomaly-58-workaround' a workaround can be enabled per SPIM
82 instance. If you are certain that transactions with
84 then nRF52832 PPI and GPIOTE resources can be saved by not
85 enabling 'anomaly-58-workaround' via the Devicetree.
95 driver instance needs to use an intermediate local RAM buffer,
113 by instances that have the WAKE line configured (see the wake-gpios
Dspi_nrfx_spim.c2 * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
102 struct spi_nrfx_data *dev_data = dev->data; in request_clock()
103 const struct spi_nrfx_config *dev_config = dev->config; in request_clock()
106 if (!dev_config->clk_dev) { in request_clock()
111 dev_config->clk_dev, &dev_config->clk_spec, in request_clock()
118 dev_data->clock_requested = true; in request_clock()
129 struct spi_nrfx_data *dev_data = dev->data; in release_clock()
130 const struct spi_nrfx_config *dev_config = dev->config; in release_clock()
132 if (!dev_data->clock_requested) { in release_clock()
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/Zephyr-latest/dts/common/nordic/
Dnrf54l20.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
12 /delete-node/ &sw_pwm;
15 #address-cells = <1>;
16 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,cortex-m33f";
26 clock-frequency = <DT_FREQ_M(128)>;
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Dnrf54l_05_10_15.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
10 #include <zephyr/dt-bindings/regulator/nrf5x.h>
12 /delete-node/ &sw_pwm;
19 #address-cells = <1>;
20 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,cortex-m33f";
30 clock-frequency = <DT_FREQ_M(128)>;
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