1# Copyright (c) 2021, Nordic Semiconductor ASA 2# SPDX-License-Identifier: Apache-2.0 3 4description: Generic LED matrix driven by nRF SoC GPIOs 5 6compatible: "nordic,nrf-led-matrix" 7 8include: display-controller.yaml 9 10properties: 11 row-gpios: 12 type: phandle-array 13 required: true 14 description: | 15 Array of GPIOs to be used as rows of the matrix. 16 17 col-gpios: 18 type: phandle-array 19 required: true 20 description: | 21 Array of GPIOs to be used as columns of the matrix. 22 23 pixel-mapping: 24 type: uint8-array 25 required: true 26 description: | 27 Array of bytes that specify which rows and columns of the matrix 28 control its particular pixels, line by line. Each byte in this 29 array corresponds to one pixel of the matrix and specifies the row 30 index in the high nibble and the column index in the low nibble. 31 32 For example, the following snippet (from the bbc_microbit board DTS): 33 34 width = <5>; 35 height = <5>; 36 pixel-mapping = [00 13 01 14 02 37 23 24 25 26 27 38 ... 39 40 specifies that: 41 - pixel (0,0) is controlled by row 0 and column 0 42 - pixel (1,0) is controlled by row 1 and column 3 43 - pixel (0,1) is controlled by row 2 and column 3 44 - pixel (1,1) is controlled by row 2 and column 4 45 and so on. 46 47 refresh-frequency: 48 type: int 49 required: true 50 description: | 51 Frequency of refreshing the matrix, in Hz. 52 53 timer: 54 type: phandle 55 required: true 56 description: | 57 Reference to a TIMER instance for controlling refreshing of the matrix. 58 59 pwm: 60 type: phandle 61 description: | 62 Reference to a PWM instance for generating pulse signals on column 63 GPIOs. If not provided, GPIOTE and PPI channels are allocated and 64 used instead for generating those pulses. 65 66 pixel-group-size: 67 type: int 68 required: true 69 description: | 70 This value specifies the maximum number of LEDs in one row that can 71 be lit simultaneously. 72 If set to 1, only a single LED is turned on in a particular time slot. 73 Bigger values increase the maximum achievable brightness of the LEDs 74 and lower the CPU load by decreasing the frequency of execution of 75 the timer interrupt handler. 76 In case GPIOTE and PPI channels are used for generating the pixel pulse 77 signals, the number of channels that need to be allocated is equal to 78 this value. 79 If GPIOTE and PPI channels are used, the upper limit for the value is 80 defined by the number of CC channels in the used timer minus one. 81 If PWM is used, the upper limit is the number of PWM channels. 82