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/Zephyr-latest/dts/bindings/clock/
Dst,stm32-lse-clock.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "st,stm32-lse-clock"
8 include: [fixed-clock.yaml]
11 driving-capability:
15 LSE driving capability, within the range 0 to 3.
16 0 represents the lowests driving capability, 3
19 - 0
20 - 1
21 - 2
22 - 3
[all …]
/Zephyr-latest/dts/arm/st/wb0/
Dstm32wb0.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv6-m.dtsi>
8 #include <zephyr/dt-bindings/i2c/i2c.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/clock/stm32wb0_clock.h>
13 #include <zephyr/dt-bindings/reset/stm32wb0_reset.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
25 zephyr,flash-controller = &flash;
[all …]
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_wb0.c4 * SPDX-License-Identifier: Apache-2.0
43 # error slow-clock source is not enabled
53 # error Invalid device selected as slow-clock
66 "clksys-prescaler cannot be 64 when SYSCLK source is Direct HSE");
108 * NOTE: (size - 1) is required to get the correct count, in measure_lsi_frequency()
113 (CONFIG_STM32WB0_LSI_MEASUREMENT_WINDOW - 1)); in measure_lsi_frequency()
137 * LSI calibration counts the amount of 16MHz clock half-periods that in measure_lsi_frequency()
140 * @p fast_clock_cycles_elapsed is the number of 16MHz clock half-periods in measure_lsi_frequency()
155 * = ------------------------------------------------ in measure_lsi_frequency()
163 * = ------------------------------------------------ in measure_lsi_frequency()
[all …]
Dclock_stm32_ll_wba.c4 * SPDX-License-Identifier: Apache-2.0
62 return -ENOTSUP; in enabled_clock()
73 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
75 return -ENOTSUP; in stm32_clock_control_on()
78 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
79 pclken->enr); in stm32_clock_control_on()
81 temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus); in stm32_clock_control_on()
94 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_off()
96 return -ENOTSUP; in stm32_clock_control_off()
99 sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_off()
[all …]
Dclock_stm32_ll_h5.c7 * SPDX-License-Identifier: Apache-2.0
144 return -ENOTSUP; in enabled_clock()
155 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
157 return -ENOTSUP; in stm32_clock_control_on()
160 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
161 pclken->enr); in stm32_clock_control_on()
163 temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus); in stm32_clock_control_on()
176 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_off()
178 return -ENOTSUP; in stm32_clock_control_off()
181 sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_off()
[all …]
Dclock_stm32_ll_common.c2 * Copyright (c) 2017-2022 Linaro Limited.
5 * SPDX-License-Identifier: Apache-2.0
76 #define RCC_PLLP_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN)
81 #define RCC_PLLQ_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN)
136 r = -ENOTSUP; in enabled_clock()
150 r = -ENOTSUP; in enabled_clock()
157 r = -ENOTSUP; in enabled_clock()
164 r = -ENOTSUP; in enabled_clock()
171 r = -ENOTSUP; in enabled_clock()
178 r = -ENOTSUP; in enabled_clock()
[all …]
Dclock_stm32_ll_u5.c6 * SPDX-License-Identifier: Apache-2.0
150 return -ENOTSUP; in enabled_clock()
161 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_on()
163 return -ENOTSUP; in stm32_clock_control_on()
166 sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_on()
167 pclken->enr); in stm32_clock_control_on()
169 temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus); in stm32_clock_control_on()
182 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) { in stm32_clock_control_off()
184 return -ENOTSUP; in stm32_clock_control_off()
187 sys_clear_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus, in stm32_clock_control_off()
[all …]
Dclock_stm32_ll_h7.c7 * SPDX-License-Identifier: Apache-2.0
339 return -ERANGE;
381 return -ENOTSUP;
392 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) {
394 return -ENOTSUP;
399 sys_set_bits(STM32H7_BUS_CLK_REG + pclken->bus, pclken->enr);
403 temp = sys_read32(STM32H7_BUS_CLK_REG + pclken->bus);
418 if (IN_RANGE(pclken->bus, STM32_PERIPH_BUS_MIN, STM32_PERIPH_BUS_MAX) == 0) {
420 return -ENOTSUP;
425 sys_clear_bits(STM32H7_BUS_CLK_REG + pclken->bus, pclken->enr);
[all …]
/Zephyr-latest/dts/arm/st/l0/
Dstm32l0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32l0_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/c0/
Dstm32c0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32c0_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/dma/stm32_dma.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/f0/
Dstm32f0.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv6-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f0_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/f3/
Dstm32f3.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f3_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/g0/
Dstm32g0.dtsi3 * Copyright (c) 2019-2024 STMicroelectronics
6 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
8 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv6-m.dtsi>
12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
[all …]
/Zephyr-latest/drivers/input/
Dinput_stmpe811.c3 * SPDX-License-Identifier: Apache-2.0
84 * - bits [1-3] X, Y only acquisition mode
89 * Analog-to-digital Converter
91 * - bit [3] selects 12 bit ADC
92 * - bits [4-6] select ADC conversion time = 80
99 * - 00 : 1.625 MHz
100 * - 01 : 3.25 MHz
101 * - 10 : 6.5 MHz
102 * - 11 : 6.5 MHz
109 * - Fractional part : 7
[all …]
/Zephyr-latest/dts/arm/st/wba/
Dstm32wba.dtsi2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
10 #include <zephyr/dt-bindings/clock/stm32wba_clock.h>
11 #include <zephyr/dt-bindings/reset/stm32wba_reset.h>
12 #include <zephyr/dt-bindings/adc/stm32u5_adc.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
[all …]
/Zephyr-latest/dts/arm/st/l4/
Dstm32l4.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/u0/
Dstm32u0.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32u0_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/adc/adc.h>
12 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/i2c/i2c.h>
[all …]
/Zephyr-latest/dts/arm/st/wl/
Dstm32wl.dtsi2 * Copyright (c) 2020-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/lora/sx126x.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
[all …]
/Zephyr-latest/dts/arm/st/wb/
Dstm32wb.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32wb_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/h5/
Dstm32h5.dtsi2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32h5_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/reset/stm32h5_reset.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
[all …]
/Zephyr-latest/dts/arm/st/g4/
Dstm32g4.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32g4_clock.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/h7rs/
Dstm32h7rs.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/stm32h7rs_clock.h>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
13 #include <zephyr/dt-bindings/reset/stm32h7rs_reset.h>
14 #include <zephyr/dt-bindings/adc/stm32h7_adc.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
[all …]
/Zephyr-latest/dts/arm/st/l5/
Dstm32l5.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv8-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
18 #include <zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/f7/
Dstm32f7.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f7_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32f4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/u5/
Dstm32u5.dtsi7 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv8-m.dtsi>
12 #include <zephyr/dt-bindings/adc/adc.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/clock/stm32u5_clock.h>
15 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #include <zephyr/dt-bindings/i2c/i2c.h>
17 #include <zephyr/dt-bindings/flash_controller/ospi.h>
18 #include <zephyr/dt-bindings/reset/stm32u5_reset.h>
19 #include <zephyr/dt-bindings/dma/stm32_dma.h>
[all …]

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