Lines Matching +full:driving +full:- +full:capability

2  * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
10 #include <zephyr/dt-bindings/clock/stm32wba_clock.h>
11 #include <zephyr/dt-bindings/reset/stm32wba_reset.h>
12 #include <zephyr/dt-bindings/adc/stm32u5_adc.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/adc/adc.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
24 zephyr,flash-controller = &flash;
25 st,lptim-stdby-timer = &rtc;
26 zephyr,bt-hci = &bt_hci_wba;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-m33";
38 cpu-power-states = <&stop0 &stop1>;
39 #address-cells = <1>;
40 #size-cells = <1>;
43 compatible = "arm,armv8m-mpu";
48 power-states {
50 compatible = "zephyr,power-state";
51 power-state-name = "suspend-to-idle";
52 substate-id = <1>;
53 min-residency-us = <100>;
56 compatible = "zephyr,power-state";
57 power-state-name = "suspend-to-idle";
58 substate-id = <2>;
59 min-residency-us = <500>;
62 compatible = "zephyr,power-state";
63 power-state-name = "suspend-to-ram";
64 substate-id = <1>;
65 min-residency-us = <1000>;
66 exit-latency-us = <50>;
72 compatible = "mmio-sram";
77 compatible = "zephyr,memory-region", "mmio-sram";
80 zephyr,memory-region = "SRAM6";
81 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
85 clk_hse: clk-hse {
86 #clock-cells = <0>;
87 compatible = "st,stm32wba-hse-clock";
88 clock-frequency = <DT_FREQ_M(32)>;
92 clk_hsi: clk-hsi {
93 #clock-cells = <0>;
94 compatible = "fixed-clock";
95 clock-frequency = <DT_FREQ_M(16)>;
99 clk_lse: clk-lse {
100 #clock-cells = <0>;
101 compatible = "st,stm32-lse-clock";
102 clock-frequency = <32768>;
103 driving-capability = <1>;
107 clk_lsi: clk-lsi {
108 #clock-cells = <0>;
109 compatible = "fixed-clock";
110 clock-frequency = <DT_FREQ_K(32)>;
115 #clock-cells = <0>;
116 compatible = "st,stm32wba-pll-clock";
123 compatible = "st,stm32-clock-mco";
129 flash: flash-controller@40022000 {
130 compatible = "st,stm32-flash-controller", "st,stm32wba-flash-controller";
134 #address-cells = <1>;
135 #size-cells = <1>;
138 compatible = "st,stm32-nv-flash", "soc-nv-flash";
140 write-block-size = <16>;
141 erase-block-size = <8192>;
143 max-erase-time = <5>;
148 compatible = "st,stm32wba-rcc";
149 clocks-controller;
150 #clock-cells = <2>;
153 rctl: reset-controller {
154 compatible = "st,stm32-rcc-rctl";
155 #reset-cells = <1>;
159 exti: interrupt-controller@46022000 {
160 compatible = "st,stm32g0-exti", "st,stm32-exti";
161 interrupt-controller;
162 #interrupt-cells = <1>;
164 num-lines = <16>;
169 interrupt-names = "line0", "line1", "line2", "line3",
173 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>,
179 pinctrl: pin-controller@42020000 {
180 compatible = "st,stm32-pinctrl";
181 #address-cells = <1>;
182 #size-cells = <1>;
186 compatible = "st,stm32-gpio";
187 gpio-controller;
188 #gpio-cells = <2>;
194 compatible = "st,stm32-gpio";
195 gpio-controller;
196 #gpio-cells = <2>;
202 compatible = "st,stm32-gpio";
203 gpio-controller;
204 #gpio-cells = <2>;
210 compatible = "st,stm32-gpio";
211 gpio-controller;
212 #gpio-cells = <2>;
219 compatible = "st,stm32-rtc";
223 alarms-count = <2>;
228 compatible = "st,stm32-watchdog";
234 compatible = "st,stm32-window-watchdog";
242 compatible = "st,stm32-usart", "st,stm32-uart";
251 compatible = "st,stm32-usart", "st,stm32-uart";
260 compatible = "st,stm32-lpuart", "st,stm32-uart";
269 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
270 #address-cells = <1>;
271 #size-cells = <0>;
279 compatible = "st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi";
280 #address-cells = <1>;
281 #size-cells = <0>;
289 compatible = "st,stm32-i2c-v2";
290 clock-frequency = <I2C_BITRATE_STANDARD>;
291 #address-cells = <1>;
292 #size-cells = <0>;
296 interrupt-names = "event", "error";
301 compatible = "st,stm32-i2c-v2";
302 clock-frequency = <I2C_BITRATE_STANDARD>;
303 #address-cells = <1>;
304 #size-cells = <0>;
308 interrupt-names = "event", "error";
313 compatible = "st,stm32-timers";
318 interrupt-names = "brk", "up", "trgcom", "cc";
323 compatible = "st,stm32-counter";
328 compatible = "st,stm32-pwm";
330 #pwm-cells = <3>;
335 compatible = "st,stm32-timers";
340 interrupt-names = "global";
345 compatible = "st,stm32-counter";
350 compatible = "st,stm32-pwm";
352 #pwm-cells = <3>;
357 compatible = "st,stm32-timers";
362 interrupt-names = "global";
367 compatible = "st,stm32-counter";
372 compatible = "st,stm32-pwm";
374 #pwm-cells = <3>;
379 compatible = "st,stm32-timers";
384 interrupt-names = "global";
388 compatible = "st,stm32-counter";
393 compatible = "st,stm32-pwm";
395 #pwm-cells = <3>;
400 compatible = "st,stm32-timers";
405 interrupt-names = "global";
409 compatible = "st,stm32-counter";
414 compatible = "st,stm32-pwm";
416 #pwm-cells = <3>;
421 compatible = "st,stm32-adc";
427 #io-channel-cells = <1>;
432 sampling-times = <2 4 8 13 20 40 80 815>;
433 num-sampling-time-common-channels = <2>;
434 st,adc-clock-source = "ASYNC";
435 st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
436 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
440 compatible = "st,stm32-lptim";
441 #address-cells = <1>;
442 #size-cells = <0>;
446 interrupt-names = "wakeup";
451 compatible = "st,stm32-lptim";
452 #address-cells = <1>;
453 #size-cells = <0>;
457 interrupt-names = "wakeup";
462 compatible = "st,stm32-rng";
467 nist-config = <0xf00d>;
468 health-test-config = <0xaac7>;
473 compatible = "st,stm32u5-dma";
474 #dma-cells = <3>;
478 dma-channels = <8>;
479 dma-requests = <52>;
480 dma-offset = <0>;
486 compatible = "st,stm32-temp-cal";
487 ts-cal1-addr = <0x0BF90710>;
488 ts-cal2-addr = <0x0BF90742>;
489 ts-cal1-temp = <30>;
490 ts-cal2-temp = <130>;
491 ts-cal-vrefanalog = <3000>;
492 io-channels = <&adc4 13>;
497 compatible = "st,hci-stm32wba";
502 compatible = "swj-connector";
503 pinctrl-0 = <&debug_jtms_swdio_pa13 &debug_jtck_swclk_pa14
506 pinctrl-1 = <&analog_pa13 &analog_pa14 &analog_pa15
508 pinctrl-names = "default", "sleep";
512 compatible = "st,stm32-smbus";
513 #address-cells = <1>;
514 #size-cells = <0>;
520 compatible = "st,stm32-smbus";
521 #address-cells = <1>;
522 #size-cells = <0>;
529 arm,num-irq-priority-bits = <4>;