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/Zephyr-latest/dts/bindings/memory-controllers/
Drenesas,ra-sdram.yaml2 # SPDX-License-Identifier: Apache-2.0
7 pinctrl-0 = <&sdram_default>;
8 pinctrl-names = "default";
10 auto-refresh-interval = <10>;
11 auto-refresh-count = <8>;
12 precharge-cycle-count = <3>;
13 multiplex-addr-shift = "10-bit";
14 edian-mode = "little-endian";
15 continuous-access;
16 bus-width = "16-bit";
[all …]
Dst,stm32-fmc-sdram.yaml2 # SPDX-License-Identifier: Apache-2.0
20 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4...>;
25 power-up-delay = <100>;
26 num-auto-refresh = <8>;
27 mode-register = <0x220>;
28 refresh-rate = <603>;
33 st,sdram-control = <STM32_FMC_SDRAM_NC_9
41 st,sdram-timing = <2 6 4 6 2 2 2>;
51 Note that you will find definitions for the st,sdram-control field at
52 dt-bindings/memory-controller/stm32-fmc-sdram.h. This file is already included
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Drenesas,smartbond-nor-psram.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "renesas,smartbond-nor-psram"
14 is-ram:
19 dev-size:
25 dev-type:
31 dev-density:
40 dev-id:
46 reset-delay-us:
52 read-cs-idle-min-ns:
59 erase-cs-idle-min-ns:
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/Zephyr-latest/boards/st/stm32f746g_disco/
Dstm32f746g_disco.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f746nghx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
13 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
17 compatible = "st,stm32f746g-disco";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
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/Zephyr-latest/boards/st/stm32f7508_dk/
Dstm32f7508_dk.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f7/stm32f750n8hx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 model = "STMicroelectronics STM32F7508-DK";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
39 compatible = "gpio-keys";
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/Zephyr-latest/drivers/memc/
Dmemc_stm32_sdram.c4 * SPDX-License-Identifier: Apache-2.0
38 const struct memc_stm32_sdram_config *config = dev->config; in memc_stm32_sdram_init()
43 sdram.Instance = config->sdram; in memc_stm32_sdram_init()
45 for (size_t i = 0U; i < config->banks_len; i++) { in memc_stm32_sdram_init()
47 memcpy(&sdram.Init, &config->banks[i].init, sizeof(sdram.Init)); in memc_stm32_sdram_init()
51 (FMC_SDRAM_TimingTypeDef *)&config->banks[i].timing); in memc_stm32_sdram_init()
55 if (config->banks_len == 2U) { in memc_stm32_sdram_init()
57 } else if (config->banks[0].init.SDBank == FMC_SDRAM_BANK1) { in memc_stm32_sdram_init()
63 sdram_cmd.AutoRefreshNumber = config->num_auto_refresh; in memc_stm32_sdram_init()
64 sdram_cmd.ModeRegisterDefinition = config->mode_register; in memc_stm32_sdram_init()
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/Zephyr-latest/boards/arduino/portenta_h7/
Darduino_portenta_h7-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "gpio-leds";
24 compatible = "usb-ulpi-phy";
25 reset-gpios = < &gpioj 4 GPIO_ACTIVE_LOW >;
26 #phy-cells = <0>;
52 pinctrl-0 = <&uart4_tx_pa0 &uart4_rx_pi9>;
53 pinctrl-names = "default";
54 current-speed = <115200>;
59 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
60 pinctrl-names = "default";
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/Zephyr-latest/boards/renesas/ek_ra8d1/
Dek_ra8d1.dts3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include "ek_ra8d1-pinctrl.dtsi"
17 model = "Renesas EK-RA8D1";
24 zephyr,shell-uart = &uart9;
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/Zephyr-latest/boards/arduino/giga_r1/
Darduino_giga_r1_stm32h747xx_m7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h747xihx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 compatible = "arduino,giga-r1";
19 zephyr,shell-uart = &usart1;
20 zephyr,uart-mcumgr = &usart1;
21 zephyr,bt-hci = &bt_hci_uart;
25 zephyr,code-partition = &slot0_partition;
29 compatible = "zephyr,memory-region", "mmio-sram";
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/Zephyr-latest/boards/st/stm32h745i_disco/
Dstm32h745i_disco_stm32h745xx_m7.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
13 model = "STMicroelectronics STM32H745I-DISCO board";
14 compatible = "st,stm32h745i-disco";
19 zephyr,shell-uart = &usart3;
23 zephyr,flash-controller = &mt25ql512ab1;
28 compatible = "pwm-leds";
32 label = "User LD8 - PWM11";
36 /* RM0455 - 23.6 External device address mapping */
38 compatible = "zephyr,memory-region", "mmio-sram";
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/Zephyr-latest/boards/st/stm32f769i_disco/
Dstm32f769i_disco.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f7/stm32f769nihx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32f769I-disco";
20 zephyr,shell-uart = &usart1;
24 zephyr,flash-controller = &mx25l51245g;
29 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region = "SDRAM1";
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/Zephyr-latest/boards/st/stm32f429i_disc1/
Dstm32f429i_disc1.dts5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f4/stm32f429zitx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/display/ili9xxx.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
20 zephyr,shell-uart = &usart1;
29 compatible = "zephyr,memory-region", "mmio-sram";
32 zephyr,memory-region = "SDRAM2";
36 compatible = "gpio-leds";
48 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/st/stm32h750b_dk/
Dstm32h750b_dk.dts2 * Copyright (c) 2023-2024 STMicroelectronics
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750xbhx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "st,stm32h750b-dk";
19 zephyr,shell-uart = &usart3;
22 zephyr,flash-controller = &mt25ql512ab1;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM2";
[all …]
/Zephyr-latest/boards/st/stm32h747i_disco/
Dstm32h747i_disco_stm32h747xx_m7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h747xihx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 compatible = "st,stm32h747i-disco";
20 zephyr,shell-uart = &usart1;
23 zephyr,flash-controller = &mt25ql512ab1;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM2";
31 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
[all …]
/Zephyr-latest/boards/st/stm32h7b3i_dk/
Dstm32h7b3i_dk.dts2 * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32h7b3i-dk";
20 zephyr,shell-uart = &usart1;
29 compatible = "gpio-leds";
41 compatible = "gpio-keys";
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/Zephyr-latest/dts/bindings/mspi/
Dmspi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
8 on-bus: mspi
14 mspi-max-frequency:
22 mspi-io-mode:
25 - "MSPI_IO_MODE_SINGLE"
26 - "MSPI_IO_MODE_DUAL"
27 - "MSPI_IO_MODE_DUAL_1_1_2"
28 - "MSPI_IO_MODE_DUAL_1_2_2"
29 - "MSPI_IO_MODE_QUAD"
30 - "MSPI_IO_MODE_QUAD_1_1_4"
[all …]
/Zephyr-latest/boards/witte/linum/
Dlinum.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h753bitx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 zephyr,shell-uart = &usart1;
22 zephyr,code-partition = &slot0_partition;
27 compatible = "zephyr,memory-region", "mmio-sram";
30 zephyr,memory-region = "SDRAM1";
31 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
35 compatible = "gpio-leds";
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/Zephyr-latest/doc/contribute/documentation/
Dgeneration.rst11 .. _documentation-overview:
18 using Sphinx to create a formatted stand-alone website. Developers can
36 * Doxygen-generated material used to create all API-specific documents
39 * Script-generated material for kernel configuration options based on Kconfig
51 rtd [shape="rectangle" label="read-the-docs\ntheme"]
56 images -> sphinx
57 rst -> sphinx
58 conf -> sphinx
59 header -> doxygen
60 doxygen -> xml
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/Zephyr-latest/scripts/west_commands/completion/
Dwest-completion.zsh4 # SPDX-License-Identifier: Apache-2.0
6 # Ensure this works also when being source-ed
9 typeset -A -g _opt_args
12 local -a builtin_cmds=(
25 local -a zephyr_ext_cmds=(
29 'sign[sign a Zephyr binary for bootloader chain-loading]'
34 'zephyr-export[export Zephyr installation as a CMake config package]'
40 local -a all_cmds=(${builtin_cmds} ${zephyr_ext_cmds})
42 if [[ -v WEST_COMP_CHECK_WORKSPACE ]]; then
44 if [ $? -eq 0 ]; then
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Dwest-completion.fish20 set -l tokens (commandline -opc)
41 set -l tokens (commandline -opc)
42 set -l argc (count $argv)
43 set -l max $argv[1]
44 set -l counter 0
46 if test $argc -eq 1
47 if test (math (count $tokens) - 2) -ge $max
60 if $counter -ge $max
77 set -l tokens (commandline -opc)
80 if string match -qr -- "$token*" "$tokens[-1]"
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/Zephyr-latest/drivers/mipi_dsi/
Ddsi_mcux_2l.c4 * SPDX-License-Identifier: Apache-2.0
71 const struct mcux_mipi_dsi_config *config = dev->config; in dsi_mcux_dma_cb()
72 struct mcux_mipi_dsi_data *data = dev->data; in dsi_mcux_dma_cb()
79 DSI_DisableInterrupts(config->base, kDSI_InterruptGroup1ApbTxDone | in dsi_mcux_dma_cb()
81 DSI_GetAndClearInterruptStatus(config->base, &int_flags1, &int_flags2); in dsi_mcux_dma_cb()
82 k_sem_give(&data->transfer_sem); in dsi_mcux_dma_cb()
99 const struct mcux_mipi_dsi_config *config = dev->config; in dsi_mcux_tx_color()
100 struct mcux_mipi_dsi_data *data = dev->data; in dsi_mcux_tx_color()
105 return -ENOTSUP; /* DMA can only transfer on virtual channel 0 */ in dsi_mcux_tx_color()
109 data->smartdma_params.p_buffer = msg->tx_buf; in dsi_mcux_tx_color()
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/Zephyr-latest/boards/nxp/mr_canhubk3/doc/
Dindex.rst6 `NXP MR-CANHUBK3`_ is an evaluation board for mobile robotics applications such
8 features an `NXP S32K344`_ general-purpose automotive microcontroller based on
9 an Arm Cortex-M7 core (Lock-Step).
14 - NXP S32K344
15 - Arm Cortex-M7 (Lock-Step), 160 MHz (Max.)
16 - 4 MB of program flash, with ECC
17 - 320 KB RAM, with ECC
18 - Ethernet 100 Mbps, CAN FD, FlexIO, QSPI
19 - 12-bit 1 Msps ADC, 16-bit eMIOS timer
21 - `NXP FS26 Safety System Basis Chip`_
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/Zephyr-latest/doc/connectivity/bluetooth/api/mesh/
Dshell.rst30 sub-commands. Every time the device boots up, make sure to call ``mesh init`` before any of the
43 The simplest way to provision the device is through self-provisioning. To do this the user must
49 devices, as long as they're assigned non-overlapping unicast addresses. Alternatively, to provision
51 ``mesh prov pb-adv on`` or ``mesh prov pb-gatt on``. The beacons can be picked up by an external
68 ``mesh prov local`` command above), we can perform self-configuration through any of the
73 uart:~$ mesh models cfg get-comp
89 uart:~$ mesh test net-send 82020100
120 .. list-table:: Parameter formats
122 :header-rows: 1
124 * - Type
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/Zephyr-latest/drivers/serial/
Duart_mchp_xec.c2 * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc.
6 * SPDX-License-Identifier: Apache-2.0
97 * RXRDY pin will go inactive when there are no more charac-
102 * reached, the RXRDY pin will go low active. Once it is acti-
107 * FIFO Mode (FCR0 = 1, FCR3 = 0) and there are no charac-
149 #define MCR_AFCE 0x20 /* auto flow control enable */
173 #define IIRC(dev) (((struct uart_xec_dev_data *)(dev)->data)->iir_cache)
242 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_clr_slp_en()
244 z_mchp_xec_pcr_periph_sleep(dev_cfg->pcr_idx, dev_cfg->pcr_bitpos, 0); in uart_clr_slp_en()
249 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_xec_girq_clr()
[all …]
/Zephyr-latest/drivers/flash/
Dflash_stm32_xspi.c4 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/flash_controller/xspi.h>
59 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_lock_thread()
61 k_sem_take(&dev_data->sem, K_FOREVER); in xspi_lock_thread()
66 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_unlock_thread()
68 k_sem_give(&dev_data->sem); in xspi_unlock_thread()
73 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_send_cmd()
76 LOG_DBG("Instruction 0x%x", cmd->Instruction); in xspi_send_cmd()
78 dev_data->cmd_status = 0; in xspi_send_cmd()
80 hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE); in xspi_send_cmd()
[all …]

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