| /hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
| D | stm32f3xx_ll_tim.h | 1932 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2678 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3615 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3618 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
3636 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3639 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
3680 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3683 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
3705 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); in LL_TIM_ConfigBRK()
3708 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
[all …]
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| /hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/ |
| D | stm32wb0x_ll_tim.h | 1768 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2376 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3139 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3152 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3195 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKBID, BreakPolarity | BreakAFMode); in LL_TIM_ConfigBRK()
3200 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3217 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3229 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_ReArmBRK()
3244 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3257 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_tim.h | 2299 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2925 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
4113 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
4115 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
4130 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
4132 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
4182 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
4184 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
4200 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
4214 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_tim.h | 2215 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2841 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3981 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3983 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
3998 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
4000 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
4050 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
4052 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
4068 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
4082 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
| D | stm32wlxx_ll_tim.h | 1915 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2523 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3422 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3435 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3483 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3498 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3510 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_ReArmBRK()
3523 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3536 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3584 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_tim.h | 2031 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2639 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3601 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3614 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3663 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3699 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3716 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3730 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3743 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3792 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
| D | stm32mp1xx_ll_tim.h | 1905 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2512 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3435 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3448 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3496 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3511 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3523 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_ReArmBRK()
3536 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3549 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3597 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
| D | stm32wbxx_ll_tim.h | 1969 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2577 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3485 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3498 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3546 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3561 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3574 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3587 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3635 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3650 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
| D | stm32u0xx_ll_tim.h | 1971 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2579 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3500 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3513 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3561 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3576 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3589 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3602 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3650 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3665 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/ |
| D | stm32c0xx_ll_tim.h | 1896 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2504 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3418 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3431 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3479 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3494 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3507 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3520 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3568 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3583 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/ |
| D | stm32f0xx_ll_tim.h | 1546 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2062 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2840 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
2842 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
2857 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
2859 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
2877 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); in LL_TIM_ConfigBRK()
2879 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
2900 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
2913 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
| D | stm32f2xx_ll_tim.h | 1567 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2083 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2861 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
2863 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
2878 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
2880 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
2898 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); in LL_TIM_ConfigBRK()
2900 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
2921 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
2934 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
| D | stm32f1xx_ll_tim.h | 1519 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2035 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2772 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
2774 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
2789 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
2791 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
2809 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); in LL_TIM_ConfigBRK()
2811 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
2832 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
2845 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_ll_tim.h | 1589 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2105 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
2883 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
2885 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_EnableBRK()
2900 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
2902 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_DisableBRK()
2920 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); in LL_TIM_ConfigBRK()
2922 tmpreg = READ_REG(TIMx->BDTR); in LL_TIM_ConfigBRK()
2943 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
2956 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_ll_tim.h | 2094 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2702 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3650 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3663 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3711 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3726 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3739 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3752 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3800 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3815 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_tim.h | 1968 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2576 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3478 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3491 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3539 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
3554 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
3567 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3580 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3628 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
3643 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
| D | stm32f7xx_ll_tim.h | 1821 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2429 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3311 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3324 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3359 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3372 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3385 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3419 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter); in LL_TIM_ConfigBRK2()
3439 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
3452 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
| D | stm32wbaxx_ll_tim.h | 2202 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2828 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3925 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3938 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3986 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |… in LL_TIM_ConfigBRK()
4001 SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM); in LL_TIM_DisarmBRK()
4014 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
4027 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
4075 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil… in LL_TIM_ConfigBRK2()
4090 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM); in LL_TIM_DisarmBRK2()
[all …]
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_ll_tim.h | 1995 MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); in LL_TIM_CC_SetLockLevel()
2603 MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); in LL_TIM_OC_SetDeadTime()
3502 SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_EnableBRK()
3515 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); in LL_TIM_DisableBRK()
3550 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter); in LL_TIM_ConfigBRK()
3563 SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_EnableBRK2()
3576 CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E); in LL_TIM_DisableBRK2()
3610 MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter); in LL_TIM_ConfigBRK2()
3630 MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); in LL_TIM_SetOffStates()
3643 SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); in LL_TIM_EnableAutomaticOutput()
[all …]
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_hal_tim_ex.c | 2225 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2552 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2557 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2564 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2569 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2606 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2611 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2616 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2629 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2634 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
| D | stm32l5xx_hal_tim_ex.c | 2091 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2413 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2418 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2425 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2430 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2467 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2472 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2477 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2490 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2495 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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| /hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/ |
| D | stm32u0xx_hal_tim_ex.c | 2093 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2397 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2402 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2409 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2414 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2451 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2456 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2461 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2474 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2479 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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| /hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/ |
| D | stm32c0xx_hal_tim_ex.c | 2123 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2389 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2394 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2401 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2406 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2443 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2448 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2453 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2466 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2471 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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| /hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/ |
| D | stm32wbxx_hal_tim_ex.c | 2117 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2399 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2404 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2411 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2416 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2453 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2458 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2463 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2476 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2481 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_tim_ex.c | 2120 htim->Instance->BDTR = tmpbdtr; in HAL_TIMEx_ConfigBreakDeadTime()
2513 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2518 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM); in HAL_TIMEx_DisarmBreakInput()
2525 tmpbdtr = READ_REG(htim->Instance->BDTR); in HAL_TIMEx_DisarmBreakInput()
2530 SET_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM); in HAL_TIMEx_DisarmBreakInput()
2567 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKBID) == TIM_BDTR_BKBID) in HAL_TIMEx_ReArmBreakInput()
2572 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2577 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
2590 if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2BID) == TIM_BDTR_BK2BID) in HAL_TIMEx_ReArmBreakInput()
2595 while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) in HAL_TIMEx_ReArmBreakInput()
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