2215   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2841   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
3981   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
3983   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK()
3998   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
4000   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK()
4050 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF | TIM_BDTR_BKBID, BreakPolarity | BreakFilter |…  in LL_TIM_ConfigBRK()
4052   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK()
4068   SET_BIT(TIMx->BDTR, TIM_BDTR_BKDSRM);  in LL_TIM_DisarmBRK()
4082   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
4084   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK2()
4099   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
4101   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK2()
4151 …MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F | TIM_BDTR_BK2BID, Break2Polarity | Break2Fil…  in LL_TIM_ConfigBRK2()
4153   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK2()
4169   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2DSRM);  in LL_TIM_DisarmBRK2()
4189   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
4202   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
4215   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
4228   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
4243   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
4258   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
4271   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()