1932   MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);  in LL_TIM_CC_SetLockLevel()
2678   MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);  in LL_TIM_OC_SetDeadTime()
3615   SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_EnableBRK()
3618   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK()
3636   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);  in LL_TIM_DisableBRK()
3639   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK()
3680   MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);  in LL_TIM_ConfigBRK()
3683   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK()
3705   MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity);  in LL_TIM_ConfigBRK()
3708   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_ConfigBRK()
3728   SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_EnableBRK2()
3731   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_EnableBRK2()
3749   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);  in LL_TIM_DisableBRK2()
3752   tmpreg = READ_REG(TIMx->BDTR);  in LL_TIM_DisableBRK2()
3788   MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);  in LL_TIM_ConfigBRK2()
3809   MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);  in LL_TIM_SetOffStates()
3822   SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_EnableAutomaticOutput()
3835   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);  in LL_TIM_DisableAutomaticOutput()
3848   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAutomaticOutput()
3863   SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_EnableAllOutputs()
3878   CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);  in LL_TIM_DisableAllOutputs()
3891   return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);  in LL_TIM_IsEnabledAllOutputs()