Home
last modified time | relevance | path

Searched refs:interrupt (Results 1 – 25 of 1190) sorted by relevance

12345678910>>...48

/Zephyr-latest/dts/arm/infineon/cat1a/legacy/
Dpsoc6_cm0.dtsi29 intmux_ch0: interrupt-controller@0 {
32 #interrupt-cells = <2>;
33 interrupt-controller;
37 intmux_ch1: interrupt-controller@1 {
40 #interrupt-cells = <2>;
41 interrupt-controller;
45 intmux_ch2: interrupt-controller@2 {
48 #interrupt-cells = <2>;
49 interrupt-controller;
53 intmux_ch3: interrupt-controller@3 {
[all …]
/Zephyr-latest/tests/kernel/interrupt/
Dmultilevel_irq.overlay11 test_cpu_intc: interrupt-controller {
14 #interrupt-cells = < 0x01 >;
15 interrupt-controller;
18 test_l1_irq: interrupt-controller@bbbbcccc {
21 interrupt-controller;
22 #interrupt-cells = <2>;
24 interrupt-parent = <&test_cpu_intc>;
27 test_l2_irq: interrupt-controller@bbbccccc {
30 interrupt-controller;
31 #interrupt-cells = <2>;
[all …]
/Zephyr-latest/dts/xtensa/nxp/
Dnxp_imx8qxp.dtsi10 irqsteer: interrupt-controller@51080000 {
18 master0: interrupt-controller@0 {
21 interrupt-controller;
22 #interrupt-cells = <1>;
26 master1: interrupt-controller@1 {
29 interrupt-controller;
30 #interrupt-cells = <1>;
34 master2: interrupt-controller@2 {
37 interrupt-controller;
38 #interrupt-cells = <1>;
[all …]
Dnxp_imx8qm.dtsi11 irqsteer: interrupt-controller@510a0000 {
19 master0: interrupt-controller@0 {
22 interrupt-controller;
23 #interrupt-cells = <1>;
27 master1: interrupt-controller@1 {
30 interrupt-controller;
31 #interrupt-cells = <1>;
35 master2: interrupt-controller@2 {
38 interrupt-controller;
39 #interrupt-cells = <1>;
[all …]
Dnxp_imx8m.dtsi24 clic: interrupt-controller@0 {
27 interrupt-controller;
28 #interrupt-cells = <3>;
52 irqsteer: interrupt-controller@30a80000 {
59 master0: interrupt-controller@0 {
62 interrupt-controller;
63 #interrupt-cells = <1>;
67 master1: interrupt-controller@1 {
70 interrupt-controller;
71 #interrupt-cells = <1>;
[all …]
/Zephyr-latest/dts/riscv/openisa/
Drv32m1_zero_riscy.dtsi59 interrupt-parent = <&event1>;
64 interrupt-parent = <&event1>;
68 interrupt-parent = <&event1>;
72 interrupt-parent = <&event1>;
76 interrupt-parent = <&event1>;
80 interrupt-parent = <&event1>;
84 interrupt-parent = <&event1>;
88 interrupt-parent = <&event1>;
92 interrupt-parent = <&intmux1_ch0>;
97 interrupt-parent = <&intmux1_ch0>;
[all …]
Drv32m1_ri5cy.dtsi57 interrupt-parent = <&event0>;
62 interrupt-parent = <&event0>;
67 interrupt-parent = <&event0>;
71 interrupt-parent = <&event0>;
75 interrupt-parent = <&event0>;
79 interrupt-parent = <&event0>;
83 interrupt-parent = <&event0>;
87 interrupt-parent = <&event0>;
93 interrupt-parent = <&intmux0_ch0>;
98 interrupt-parent = <&intmux0_ch1>;
[all …]
Drv32m1.dtsi6 #include <zephyr/dt-bindings/interrupt-controller/openisa-intmux.h>
72 event0: interrupt-controller@e0041000 {
75 #interrupt-cells = <1>;
76 interrupt-controller;
80 event1: interrupt-controller@4101f000 {
83 #interrupt-cells = <1>;
84 interrupt-controller;
98 intmux0_ch0: interrupt-controller@0 {
101 #interrupt-cells = <1>;
102 interrupt-controller;
[all …]
/Zephyr-latest/tests/drivers/counter/counter_basic_api/sysbuild/vpr_launcher/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay5 interrupt-parent = <&cpuppr_clic>;
10 interrupt-parent = <&cpuppr_clic>;
15 interrupt-parent = <&cpuppr_clic>;
20 interrupt-parent = <&cpuppr_clic>;
25 interrupt-parent = <&cpuppr_clic>;
30 interrupt-parent = <&cpuppr_clic>;
35 interrupt-parent = <&cpuppr_clic>;
40 interrupt-parent = <&cpuppr_clic>;
45 interrupt-parent = <&cpuppr_clic>;
50 interrupt-parent = <&cpuppr_clic>;
/Zephyr-latest/dts/riscv/microchip/
Dmpfs.dtsi23 hlic0: interrupt-controller {
26 #interrupt-cells = <1>;
27 interrupt-controller;
37 hlic1: interrupt-controller {
40 #interrupt-cells = <1>;
41 interrupt-controller;
51 hlic2: interrupt-controller {
54 #interrupt-cells = <1>;
55 interrupt-controller;
65 hlic3: interrupt-controller {
[all …]
/Zephyr-latest/tests/drivers/build_all/interrupt_controller/common/boards/
Dimx8mp_evk_mimx8ml8_adsp.overlay14 irqsteer: interrupt-controller@30a80000 {
21 master0: interrupt-controller@0 {
24 interrupt-controller;
25 #interrupt-cells = <1>;
29 master1: interrupt-controller@1 {
32 interrupt-controller;
33 #interrupt-cells = <1>;
37 master2: interrupt-controller@2 {
40 interrupt-controller;
41 #interrupt-cells = <1>;
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/include/
D_soc_inthandlers.h11 #error core-isa.h interrupt level does not match dispatcher!
14 #error core-isa.h interrupt level does not match dispatcher!
17 #error core-isa.h interrupt level does not match dispatcher!
20 #error core-isa.h interrupt level does not match dispatcher!
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/dts/riscv/qemu/
Dvirt-riscv.dtsi29 interrupt-parent = < &plic >;
46 hlic0: interrupt-controller {
49 #interrupt-cells = < 0x01 >;
50 interrupt-controller;
60 hlic1: interrupt-controller {
63 #interrupt-cells = < 0x01 >;
64 interrupt-controller;
74 hlic2: interrupt-controller {
77 #interrupt-cells = < 0x01 >;
78 interrupt-controller;
[all …]
/Zephyr-latest/dts/riscv/andes/
Dandes_v5_ae350.dtsi28 cpu0_intc: interrupt-controller {
31 #interrupt-cells = <1>;
32 interrupt-controller;
45 cpu1_intc: interrupt-controller {
48 #interrupt-cells = <1>;
49 interrupt-controller;
62 cpu2_intc: interrupt-controller {
65 #interrupt-cells = <1>;
66 interrupt-controller;
79 cpu3_intc: interrupt-controller {
[all …]
/Zephyr-latest/scripts/dts/python-devicetree/tests/
Dtest.dts16 interrupt-parent-test {
18 compatible = "interrupt-three-cell";
19 #interrupt-cells = <3>;
20 interrupt-controller;
24 interrupt-names = "foo", "bar";
25 interrupt-parent = <&{/interrupt-parent-test/controller}>;
30 compatible = "interrupt-one-cell";
31 #interrupt-cells = <1>;
32 interrupt-controller;
35 compatible = "interrupt-two-cell";
[all …]
/Zephyr-latest/soc/nxp/imx/imx8m/adsp/
D_soc_inthandlers.h23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
41 #error core-isa.h interrupt level does not match dispatcher!
44 #error core-isa.h interrupt level does not match dispatcher!
47 #error core-isa.h interrupt level does not match dispatcher!
50 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/soc/nxp/imx/imx8x/adsp/
D_soc_inthandlers.h23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
41 #error core-isa.h interrupt level does not match dispatcher!
44 #error core-isa.h interrupt level does not match dispatcher!
47 #error core-isa.h interrupt level does not match dispatcher!
50 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/soc/nxp/imx/imx8/adsp/
D_soc_inthandlers.h23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
41 #error core-isa.h interrupt level does not match dispatcher!
44 #error core-isa.h interrupt level does not match dispatcher!
47 #error core-isa.h interrupt level does not match dispatcher!
50 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/soc/espressif/common/include/
D_soc_inthandlers.h24 #error core-isa.h interrupt level does not match dispatcher!
27 #error core-isa.h interrupt level does not match dispatcher!
30 #error core-isa.h interrupt level does not match dispatcher!
33 #error core-isa.h interrupt level does not match dispatcher!
36 #error core-isa.h interrupt level does not match dispatcher!
39 #error core-isa.h interrupt level does not match dispatcher!
42 #error core-isa.h interrupt level does not match dispatcher!
45 #error core-isa.h interrupt level does not match dispatcher!
48 #error core-isa.h interrupt level does not match dispatcher!
51 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/soc/nxp/imx/imx8ulp/adsp/
D_soc_inthandlers.h23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
41 #error core-isa.h interrupt level does not match dispatcher!
44 #error core-isa.h interrupt level does not match dispatcher!
47 #error core-isa.h interrupt level does not match dispatcher!
50 #error core-isa.h interrupt level does not match dispatcher!
[all …]
/Zephyr-latest/dts/arc/synopsys/
Darc_iot.dtsi26 interrupt-controller;
27 #interrupt-cells = <2>;
33 interrupt-parent = <&intc>;
81 interrupt-parent = <&intc>;
92 interrupt-parent = <&intc>;
103 interrupt-parent = <&intc>;
114 interrupt-parent = <&intc>;
122 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
144 interrupt-parent = <&intc>;
[all …]
/Zephyr-latest/dts/x86/intel/
Dgpio_common.dtsi7 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
15 interrupt-parent = <&intc>;
24 interrupt-parent = <&intc>;
33 interrupt-parent = <&intc>;
42 interrupt-parent = <&intc>;
51 interrupt-parent = <&intc>;
60 interrupt-parent = <&intc>;
69 interrupt-parent = <&intc>;
78 interrupt-parent = <&intc>;
87 interrupt-parent = <&intc>;
[all …]
/Zephyr-latest/boards/mediatek/mt8195/
Dmt8195_adsp.dts45 interrupt-controller;
46 #interrupt-cells = <3>;
51 interrupt-controller;
52 #interrupt-cells = <3>;
57 interrupt-parent = <&core_intc>;
62 interrupt-controller;
63 #interrupt-cells = <3>;
68 interrupt-parent = <&core_intc>;
79 interrupt-parent = <&intc23>;
86 interrupt-parent = <&intc23>;
[all …]
/Zephyr-latest/dts/arm64/broadcom/
Dviper-a72.dtsi10 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
26 interrupt-parent = <&gic>;
38 gic: interrupt-controller@42700000 {
42 interrupt-controller;
43 #interrupt-cells = <4>;
50 interrupt-parent = <&gic>;
56 interrupt-parent = <&gic>;
62 interrupt-parent = <&gic>;
/Zephyr-latest/soc/cdns/xtensa_sample_controller/include/
D_soc_inthandlers.h17 #error core-isa.h interrupt level does not match dispatcher!
20 #error core-isa.h interrupt level does not match dispatcher!
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
38 #error core-isa.h interrupt level does not match dispatcher!
41 #error core-isa.h interrupt level does not match dispatcher!
44 #error core-isa.h interrupt level does not match dispatcher!
[all …]

12345678910>>...48