1/*
2 * Copyright 2021, 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <nxp/nxp_imx8.dtsi>
8
9/ {
10	irqsteer: interrupt-controller@51080000 {
11		compatible = "nxp,irqsteer-intc";
12		reg = <0x51080000 DT_SIZE_K(64)>;
13		power-domains = <&irqstr_pd>;
14
15		#size-cells = <0>;
16		#address-cells = <1>;
17
18		master0: interrupt-controller@0 {
19			compatible = "nxp,irqsteer-master";
20			reg = <0>;
21			interrupt-controller;
22			#interrupt-cells = <1>;
23			interrupts-extended = <&clic 19 0 0>;
24		};
25
26		master1: interrupt-controller@1 {
27			compatible = "nxp,irqsteer-master";
28			reg = <1>;
29			interrupt-controller;
30			#interrupt-cells = <1>;
31			interrupts-extended = <&clic 20 0 0>;
32		};
33
34		master2: interrupt-controller@2 {
35			compatible = "nxp,irqsteer-master";
36			reg = <2>;
37			interrupt-controller;
38			#interrupt-cells = <1>;
39			interrupts-extended = <&clic 21 0 0>;
40		};
41
42		master3: interrupt-controller@3 {
43			compatible = "nxp,irqsteer-master";
44			reg = <3>;
45			interrupt-controller;
46			#interrupt-cells = <1>;
47			interrupts-extended = <&clic 22 0 0>;
48		};
49
50		master4: interrupt-controller@4 {
51			compatible = "nxp,irqsteer-master";
52			reg = <4>;
53			interrupt-controller;
54			#interrupt-cells = <1>;
55			interrupts-extended = <&clic 23 0 0>;
56		};
57
58		master5: interrupt-controller@5 {
59			compatible = "nxp,irqsteer-master";
60			reg = <5>;
61			interrupt-controller;
62			#interrupt-cells = <1>;
63			interrupts-extended = <&clic 24 0 0>;
64		};
65
66		master6: interrupt-controller@6 {
67			compatible = "nxp,irqsteer-master";
68			reg = <6>;
69			interrupt-controller;
70			#interrupt-cells = <1>;
71			interrupts-extended = <&clic 25 0 0>;
72		};
73
74		master7: interrupt-controller@7 {
75			compatible = "nxp,irqsteer-master";
76			reg = <7>;
77			interrupt-controller;
78			#interrupt-cells = <1>;
79			interrupts-extended = <&clic 26 0 0>;
80		};
81	};
82};
83