Home
last modified time | relevance | path

Searched refs:kSCG_AsyncClkDivBy2 (Results 1 – 25 of 47) sorted by relevance

12

/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
176 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
190 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
288 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
302 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
408 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
422 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.c74 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
183 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
197 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
294 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
308 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
423 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
437 .div2 = kSCG_AsyncClkDivBy2, /* System PLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/
Dclock_config.c74 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
175 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
188 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
280 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
293 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/project_template/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
178 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
189 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
290 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
301 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
176 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
189 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
284 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
297 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/project_template/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
171 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
182 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
273 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
284 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/
Dclock_config.c71 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
170 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
181 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
271 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
282 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/project_template/
Dclock_config.c71 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
170 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
181 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
271 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
282 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-ke15z/
Dclock_config.c68 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
158 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
171 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
262 .div2 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 2: divided by 2 */
275 .div2 = kSCG_AsyncClkDivBy2, /* Low Power FLL Clock Divider 2: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c89 .div3 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
205 .div3 = kSCG_AsyncClkDivBy2, /* Slow IRC Clock Divider 3: divided by 2 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/project_template/
Dclock_config.c72 .enableMode = kSCG_SircEnable, .div2 = kSCG_AsyncClkDivBy2, .range = kSCG_SircRangeHigh}; in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/project_template/
Dclock_config.c72 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/project_template/
Dclock_config.c72 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/project_template/
Dclock_config.c72 .enableMode = kSCG_SircEnable, .div2 = kSCG_AsyncClkDivBy2, .range = kSCG_SircRangeHigh}; in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/project_template/
Dclock_config.c72 .enableMode = kSCG_SircEnable, .div2 = kSCG_AsyncClkDivBy2, .range = kSCG_SircRangeHigh}; in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/project_template/
Dclock_config.c72 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/project_template/
Dclock_config.c72 .enableMode = kSCG_SircEnable, .div2 = kSCG_AsyncClkDivBy2, .range = kSCG_SircRangeHigh}; in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/project_template/
Dclock_config.c72 .enableMode = kSCG_SircEnable, .div2 = kSCG_AsyncClkDivBy2, .range = kSCG_SircRangeHigh}; in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/project_template/
Dclock_config.c72 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/project_template/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/project_template/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/project_template/
Dclock_config.c73 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-k32w042/
Dclock_config.c67 .div2 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/project_template/
Dclock_config.c74 .div3 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/project_template/
Dclock_config.c74 .div3 = kSCG_AsyncClkDivBy2, in CLOCK_CONFIG_FircSafeConfig()

12