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Searched refs:kSCG_AsyncClkDivBy1 (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c169 .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */
170 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
175 .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */
181 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
182 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
189 .div1 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 1: divided by 1 */
281 .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */
282 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
287 .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */
293 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.c176 .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */
177 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
182 .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */
188 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
189 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
196 .div1 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 1: divided by 1 */
287 .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */
288 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
293 .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */
299 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/
Dclock_config.c151 .div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by 1 */
157 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
158 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
159 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
166 .div1 = kSCG_AsyncClkDivBy1, /* Low Power FLL Clock Divider 1: divided by 1 */
251 .div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by 1 */
257 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
258 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
259 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
266 .div1 = kSCG_AsyncClkDivBy1, /* Low Power FLL Clock Divider 1: divided by 1 */
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l3a6/project_template/
Dclock_config.c153 ….div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by…
158 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
159 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
160 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
166 .div1 = kSCG_AsyncClkDivBy1, /* Low Power FLL Clock Divider 1: divided by 1 */
252 ….div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by…
257 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
258 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
259 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
354 ….div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by…
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c197 .div3 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 3: divided by 1 */
211 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
212 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
327 .div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided by 1 */
328 .div3 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 3: divided by 1 */
335 .div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by 1 */
336 .div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by 1 */
342 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
343 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
351 .div1 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 1: divided by 1 */
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/project_template/
Dclock_config.c212 ….div1 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 1: divided …
213 ….div3 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 3: divided …
219 ….div1 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 1: divided by…
220 ….div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by…
225 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
226 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
233 .div1 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 1: divided by 1 */
234 .div3 = kSCG_AsyncClkDivBy1, /* System PLL Clock Divider 3: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c76 .div1 = kSCG_AsyncClkDivBy1,
93 .div1 = kSCG_AsyncClkDivBy1,
94 .div2 = kSCG_AsyncClkDivBy1,
298 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
299 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
301 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
302 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
304 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
305 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c76 .div1 = kSCG_AsyncClkDivBy1,
93 .div1 = kSCG_AsyncClkDivBy1,
94 .div2 = kSCG_AsyncClkDivBy1,
298 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
299 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
301 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
302 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
304 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
305 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c76 .div1 = kSCG_AsyncClkDivBy1,
93 .div1 = kSCG_AsyncClkDivBy1,
94 .div2 = kSCG_AsyncClkDivBy1,
298 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
299 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
301 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
302 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
304 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
305 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c83 .div1 = kSCG_AsyncClkDivBy1,
84 .div2 = kSCG_AsyncClkDivBy1,
270 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
271 CLOCK_SetSysOscAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
273 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
274 CLOCK_SetFircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
276 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv1Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
277 CLOCK_SetSircAsyncClkDiv(kSCG_AsyncDiv2Clk, kSCG_AsyncClkDivBy1); in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-k32w042/
Dclock_config.c145 ….div3 = kSCG_AsyncClkDivBy1, /* Slow IRC Clock Divider 3: divided by…
150 .div1 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 1: divided by 1 */
151 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
152 .div3 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 3: divided by 1 */
158 .div1 = kSCG_AsyncClkDivBy1, /* Low Power FLL Clock Divider 1: Clock output is disabled */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/
Dclock_config.c169 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
181 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
274 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
286 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke15z/project_template/
Dclock_config.c173 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
183 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
285 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
295 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/
Dclock_config.c170 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
182 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
278 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
290 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke16z/project_template/
Dclock_config.c166 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
176 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
268 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
278 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/
Dclock_config.c165 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
175 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
266 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
276 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmke17z/project_template/
Dclock_config.c165 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
175 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
266 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
276 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/boardkit/frdm-ke15z/
Dclock_config.c152 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
164 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
256 .div2 = kSCG_AsyncClkDivBy1, /* System OSC Clock Divider 2: divided by 1 */
268 .div2 = kSCG_AsyncClkDivBy1, /* Fast IRC Clock Divider 2: divided by 1 */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h339 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h331 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h343 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h347 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h354 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h389 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h355 kSCG_AsyncClkDivBy1 = 1U, /*!< Divided by 1. */ enumerator

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