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Searched refs:RESET_REASON_CPU0_MWDT1 (Results 1 – 25 of 27) sorted by relevance

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/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dreset_reasons.h43 RESET_REASON_CPU0_MWDT1 = 0x11, // Main watch dog 1 resets CPU 0 enumerator
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dreset_reasons.h44 RESET_REASON_CPU0_MWDT1 = 0x11, // Main watch dog 1 resets CPU 0 enumerator
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dreset_reasons.h43 RESET_REASON_CPU0_MWDT1 = 0x11, // Main watch dog 1 resets CPU 0 enumerator
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dreset_reasons.h51 RESET_REASON_CPU0_MWDT1 = 0x11, // Main watch dog 1 resets CPU 0 enumerator
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dreset_reasons.h54 RESET_REASON_CPU0_MWDT1 = 0x11, // Main watch dog 1 resets CPU 0 enumerator
/hal_espressif-latest/zephyr/esp32s2/src/
Dsoc_init.c39 rst_reas == RESET_REASON_CPU0_MWDT1 || rst_reas == RESET_REASON_CPU0_RTC_WDT) { in check_wdt_reset()
/hal_espressif-latest/zephyr/esp32c6/src/
Dsoc_init.c91 rst_reas == RESET_REASON_CPU0_MWDT1 || rst_reas == RESET_REASON_CPU0_RTC_WDT) { in check_wdt_reset()
/hal_espressif-latest/zephyr/esp32c3/src/
Dsoc_init.c115 rst_reas == RESET_REASON_CPU0_MWDT1 || rst_reas == RESET_REASON_CPU0_RTC_WDT) { in check_wdt_reset()
/hal_espressif-latest/components/esp_system/port/soc/esp32c3/
Dreset_reason.c50 case RESET_REASON_CPU0_MWDT1: in get_reset_reason()
Dclk.c212 rst_reason == RESET_REASON_CPU0_RTC_WDT || rst_reason == RESET_REASON_CPU0_MWDT1) { in esp_perip_clk_init()
/hal_espressif-latest/components/esp_system/port/soc/esp32s2/
Dreset_reason.c47 case RESET_REASON_CPU0_MWDT1: in get_reset_reason()
/hal_espressif-latest/components/esp_system/port/soc/esp32s3/
Dreset_reason.c47 case RESET_REASON_CPU0_MWDT1: in get_reset_reason()
/hal_espressif-latest/components/esp_system/port/soc/esp32c6/
Dreset_reason.c47 case RESET_REASON_CPU0_MWDT1: in get_reset_reason()
Dclk.c227 rst_reason == RESET_REASON_CPU0_RTC_WDT || rst_reason == RESET_REASON_CPU0_MWDT1) { in esp_perip_clk_init()
/hal_espressif-latest/components/esp_system/port/soc/esp32h2/
Dreset_reason.c47 case RESET_REASON_CPU0_MWDT1: in get_reset_reason()
Dclk.c223 rst_reason == RESET_REASON_CPU0_RTC_WDT || rst_reason == RESET_REASON_CPU0_MWDT1) { in esp_perip_clk_init()
/hal_espressif-latest/components/bootloader_support/src/esp32h2/
Dbootloader_esp32h2.c69 …rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RE… in bootloader_check_wdt_reset()
/hal_espressif-latest/components/bootloader_support/src/esp32c6/
Dbootloader_esp32c6.c73 …rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RE… in bootloader_check_wdt_reset()
/hal_espressif-latest/components/bootloader_support/src/esp32c3/
Dbootloader_esp32c3.c72 …rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RE… in bootloader_check_wdt_reset()
/hal_espressif-latest/components/bootloader_support/src/esp32s2/
Dbootloader_esp32s2.c96 …rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RE… in bootloader_check_wdt_reset()
/hal_espressif-latest/components/esp_rom/include/esp32s2/rom/
Drtc.h108 ESP_STATIC_ASSERT((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESE…
/hal_espressif-latest/components/esp_rom/include/esp32c6/rom/
Drtc.h113 ESP_STATIC_ASSERT((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESE…
/hal_espressif-latest/components/esp_rom/include/esp32h2/rom/
Drtc.h111 ESP_STATIC_ASSERT((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESE…
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Drtc.h107 ESP_STATIC_ASSERT((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESE…
/hal_espressif-latest/components/esp_rom/include/esp32c3/rom/
Drtc.h112 ESP_STATIC_ASSERT((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESE…

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