1 /*
2 * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6 #include <stdint.h>
7 #include "sdkconfig.h"
8 #include "esp_attr.h"
9 #include "esp_log.h"
10 #include "esp_image_format.h"
11 #include "flash_qio_mode.h"
12 #include "esp_rom_gpio.h"
13 #include "esp_rom_efuse.h"
14 #include "esp_rom_uart.h"
15 #include "esp_rom_sys.h"
16 #include "esp_rom_spiflash.h"
17 #include "soc/gpio_sig_map.h"
18 #include "soc/io_mux_reg.h"
19 #include "soc/assist_debug_reg.h"
20 #include "esp_cpu.h"
21 #include "soc/rtc.h"
22 #include "soc/spi_periph.h"
23 #include "soc/extmem_reg.h"
24 #include "soc/io_mux_reg.h"
25 #include "soc/pcr_reg.h"
26 #include "esp32h2/rom/efuse.h"
27 #include "esp32h2/rom/ets_sys.h"
28 #include "bootloader_common.h"
29 #include "bootloader_init.h"
30 #include "bootloader_clock.h"
31 #include "bootloader_flash_config.h"
32 #include "bootloader_mem.h"
33 #include "esp_private/regi2c_ctrl.h"
34 #include "soc/regi2c_lp_bias.h"
35 #include "soc/regi2c_bias.h"
36 #include "modem/modem_lpcon_reg.h"
37 #include "bootloader_console.h"
38 #include "bootloader_flash_priv.h"
39 #include "bootloader_soc.h"
40 #include "esp_private/bootloader_flash_internal.h"
41 #include "esp_efuse.h"
42 #include "hal/mmu_hal.h"
43 #include "hal/cache_hal.h"
44 #include "soc/lp_wdt_reg.h"
45 #include "hal/efuse_hal.h"
46 #include "modem/modem_lpcon_reg.h"
47
48 static const char *TAG = "boot.esp32h2";
49
wdt_reset_cpu0_info_enable(void)50 static void wdt_reset_cpu0_info_enable(void)
51 {
52 REG_SET_BIT(PCR_ASSIST_CONF_REG, PCR_ASSIST_CLK_EN);
53 REG_CLR_BIT(PCR_ASSIST_CONF_REG, PCR_ASSIST_RST_EN);
54 REG_WRITE(ASSIST_DEBUG_CORE_0_RCD_EN_REG, ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN | ASSIST_DEBUG_CORE_0_RCD_RECORDEN);
55 }
56
wdt_reset_info_dump(int cpu)57 static void wdt_reset_info_dump(int cpu)
58 {
59 (void) cpu;
60 // saved PC was already printed by the ROM bootloader.
61 // nothing to do here.
62 }
63
bootloader_check_wdt_reset(void)64 static void bootloader_check_wdt_reset(void)
65 {
66 int wdt_rst = 0;
67 soc_reset_reason_t rst_reason = esp_rom_get_reset_reason(0);
68 if (rst_reason == RESET_REASON_CORE_RTC_WDT || rst_reason == RESET_REASON_CORE_MWDT0 || rst_reason == RESET_REASON_CORE_MWDT1 ||
69 rst_reason == RESET_REASON_CPU0_MWDT0 || rst_reason == RESET_REASON_CPU0_MWDT1 || rst_reason == RESET_REASON_CPU0_RTC_WDT) {
70 ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
71 wdt_rst = 1;
72 }
73 if (wdt_rst) {
74 // if reset by WDT dump info from trace port
75 wdt_reset_info_dump(0);
76 }
77 wdt_reset_cpu0_info_enable();
78 }
79
bootloader_super_wdt_auto_feed(void)80 static void bootloader_super_wdt_auto_feed(void)
81 {
82 REG_WRITE(LP_WDT_SWD_WPROTECT_REG, LP_WDT_SWD_WKEY_VALUE);
83 REG_SET_BIT(LP_WDT_SWD_CONFIG_REG, LP_WDT_SWD_AUTO_FEED_EN);
84 REG_WRITE(LP_WDT_SWD_WPROTECT_REG, 0);
85 }
86
bootloader_hardware_init(void)87 static inline void bootloader_hardware_init(void)
88 {
89 /* Enable analog i2c master clock */
90 SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN);
91 REGI2C_WRITE_MASK(I2C_BIAS, I2C_BIAS_DREG_0P8, 8); // fix low temp issue, need to increase this internal voltage
92
93 }
94
bootloader_ana_reset_config(void)95 static inline void bootloader_ana_reset_config(void)
96 {
97 //Enable super WDT reset.
98 bootloader_ana_super_wdt_reset_config(true);
99 //Enable BOD reset
100 bootloader_ana_bod_reset_config(true);
101 }
102
bootloader_init(void)103 esp_err_t bootloader_init(void)
104 {
105 esp_err_t ret = ESP_OK;
106
107 bootloader_hardware_init();
108 bootloader_ana_reset_config();
109 bootloader_super_wdt_auto_feed();
110
111 // In RAM_APP, memory will be initialized in `call_start_cpu0`
112 #if !CONFIG_APP_BUILD_TYPE_RAM
113 // protect memory region
114 bootloader_init_mem();
115 /* check that static RAM is after the stack */
116 assert(&_bss_start <= &_bss_end);
117 assert(&_data_start <= &_data_end);
118 // clear bss section
119 bootloader_clear_bss_section();
120 #endif // !CONFIG_APP_BUILD_TYPE_RAM
121
122 // init eFuse virtual mode (read eFuses to RAM)
123 #ifdef CONFIG_EFUSE_VIRTUAL
124 ESP_LOGW(TAG, "eFuse virtual mode is enabled. If Secure boot or Flash encryption is enabled then it does not provide any security. FOR TESTING ONLY!");
125 #ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
126 esp_efuse_init_virtual_mode_in_ram();
127 #endif
128 #endif
129 // config clock
130 bootloader_clock_configure();
131 // initialize console, from now on, we can use esp_log
132 bootloader_console_init();
133 /* print 2nd bootloader banner */
134 bootloader_print_banner();
135
136 #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
137 //init cache hal
138 cache_hal_init();
139 //init mmu
140 mmu_hal_init();
141 // update flash ID
142 bootloader_flash_update_id();
143 // Check and run XMC startup flow
144 if ((ret = bootloader_flash_xmc_startup()) != ESP_OK) {
145 ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
146 return ret;
147 }
148 #if !CONFIG_APP_BUILD_TYPE_RAM
149 // read bootloader header
150 if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
151 return ret;
152 }
153 // read chip revision and check if it's compatible to bootloader
154 if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
155 return ret;
156 }
157 #endif // !CONFIG_APP_BUILD_TYPE_RAM
158 // initialize spi flash
159 if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
160 return ret;
161 }
162 #endif //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
163
164 // check whether a WDT reset happend
165 bootloader_check_wdt_reset();
166 // config WDT
167 bootloader_config_wdt();
168 // enable RNG early entropy source
169 bootloader_enable_random();
170
171 return ret;
172 }
173
