1 /*
2  * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #include <stdbool.h>
7 #include "soc_init.h"
8 #include "soc/rtc_cntl_reg.h"
9 #include "soc/soc.h"
10 #include "soc/system_reg.h"
11 #include "soc/assist_debug_reg.h"
12 #include "soc/reset_reasons.h"
13 #include "soc/dport_access.h"
14 #include "esp_log.h"
15 
16 const static char *TAG = "soc_init";
17 
super_wdt_auto_feed(void)18 void super_wdt_auto_feed(void)
19 {
20 	REG_SET_BIT(RTC_CNTL_SWD_CONF_REG, RTC_CNTL_SWD_AUTO_FEED_EN);
21 }
22 
wdt_reset_cpu0_info_enable(void)23 void wdt_reset_cpu0_info_enable(void)
24 {
25 	DPORT_REG_SET_BIT(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_ASSIST_DEBUG);
26 	DPORT_REG_CLR_BIT(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_ASSIST_DEBUG);
27 	REG_WRITE(ASSIST_DEBUG_PRO_PDEBUGENABLE, 1);
28 	REG_WRITE(ASSIST_DEBUG_PRO_RCD_RECORDING, 1);
29 }
30 
check_wdt_reset(void)31 void check_wdt_reset(void)
32 {
33 	int wdt_rst = 0;
34 	soc_reset_reason_t rst_reas;
35 
36 	rst_reas = esp_rom_get_reset_reason(0);
37 	if (rst_reas == RESET_REASON_CORE_RTC_WDT || rst_reas == RESET_REASON_CORE_MWDT0 ||
38 	    rst_reas == RESET_REASON_CORE_MWDT1 || rst_reas == RESET_REASON_CPU0_MWDT0 ||
39 	    rst_reas == RESET_REASON_CPU0_MWDT1 || rst_reas == RESET_REASON_CPU0_RTC_WDT) {
40 		ESP_EARLY_LOGW(TAG, "PRO CPU has been reset by WDT.");
41 		wdt_rst = 1;
42 	}
43 
44 	wdt_reset_cpu0_info_enable();
45 }
46 
47 /* Not supported but common bootloader calls the function. Do nothing */
ana_clock_glitch_reset_config(bool enable)48 void ana_clock_glitch_reset_config(bool enable)
49 {
50 	(void)enable;
51 }
52