/hal_espressif-latest/components/soc/esp32c2/include/soc/ |
D | soc.h | 102 #define READ_PERI_REG(addr) ({ … macro 113 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 118 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 123 …(READ_PERI_REG(reg) & (mask)); … 128 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 133 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 138 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32c6/include/soc/ |
D | soc.h | 96 #define READ_PERI_REG(addr) ({ … macro 107 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 112 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 117 …(READ_PERI_REG(reg) & (mask)); … 122 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 127 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 132 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32s2/include/soc/ |
D | soc.h | 100 #define READ_PERI_REG(addr) ({ … macro 111 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 116 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 121 …(READ_PERI_REG(reg) & (mask)); … 126 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 131 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 136 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32h2/include/soc/ |
D | soc.h | 94 #define READ_PERI_REG(addr) ({ … macro 105 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 110 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 115 …(READ_PERI_REG(reg) & (mask)); … 120 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 125 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 130 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32c3/include/soc/ |
D | soc.h | 94 #define READ_PERI_REG(addr) ({ … macro 105 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 110 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 115 …(READ_PERI_REG(reg) & (mask)); … 120 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 125 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 130 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32s3/include/soc/ |
D | soc.h | 109 #define READ_PERI_REG(addr) ({ … macro 120 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 125 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 130 …(READ_PERI_REG(reg) & (mask)); … 135 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 140 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 145 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/soc/esp32/include/soc/ |
D | soc.h | 106 #define READ_PERI_REG(addr) ({ … macro 107 …ASSERT_IF_DPORT_REG((addr), READ_PERI_REG); … 120 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask)))); … 126 …WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask))); … 132 …(READ_PERI_REG(reg) & (mask)); … 138 …((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1)); … 144 …WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|(((value) & (bit_map))<<(shift))… 150 …((READ_PERI_REG(reg)>>(shift))&(mask)); …
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/hal_espressif-latest/components/esp_rom/patches/ |
D | esp_rom_spiflash.c | 117 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_erase_chip_internal() 139 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_erase_sector_internal() 155 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_erase_block_internal() 210 while ( READ_PERI_REG(PERIPHS_SPI_FLASH_CMD ) != 0 ) { in esp_rom_spiflash_program_page_internal() 227 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_read_status() 230 status_value = READ_PERI_REG(PERIPHS_SPI_FLASH_STATUS) & (spi->status_mask); in esp_rom_spiflash_read_status() 258 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_write_status() 294 *addr_dest++ = READ_PERI_REG(PERIPHS_SPI_FLASH_C0 + i * 4); in esp_rom_spiflash_read_data() 308 *addr_dest++ = READ_PERI_REG(PERIPHS_SPI_FLASH_C0 + i * 4); in esp_rom_spiflash_read_data() 325 while (READ_PERI_REG(PERIPHS_SPI_FLASH_CMD) != 0) { in esp_rom_spiflash_enable_write() [all …]
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/hal_espressif-latest/components/hal/esp32c2/include/hal/ |
D | rtc_cntl_ll.h | 72 uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); in rtc_cntl_ll_get_rtc_time() 73 t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; in rtc_cntl_ll_get_rtc_time()
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D | clk_tree_ll.h | 519 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz() 538 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz() 572 uint32_t apb_freq_hz = (READ_PERI_REG(RTC_APB_FREQ_REG) & UINT16_MAX) << 12; in clk_ll_apb_load_freq_hz()
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/hal_espressif-latest/components/hal/esp32c3/include/hal/ |
D | rtc_cntl_ll.h | 78 uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); in rtc_cntl_ll_get_rtc_time() 79 t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; in rtc_cntl_ll_get_rtc_time()
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D | clk_tree_ll.h | 120 uint32_t xtal_conf = READ_PERI_REG(RTC_CNTL_EXT_XTL_CONF_REG); in clk_ll_xtal32k_is_enabled() 627 uint32_t reg = READ_PERI_REG(RTC_XTAL_FREQ_REG) & RTC_DISABLE_ROM_LOG; in clk_ll_xtal_store_freq_mhz() 646 uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG); in clk_ll_xtal_load_freq_mhz() 680 uint32_t apb_freq_hz = (READ_PERI_REG(RTC_APB_FREQ_REG) & UINT16_MAX) << 12; in clk_ll_apb_load_freq_hz()
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/hal_espressif-latest/components/hal/esp32s2/include/hal/ |
D | rtc_cntl_ll.h | 92 uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); in rtc_cntl_ll_get_rtc_time() 93 t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; in rtc_cntl_ll_get_rtc_time()
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/hal_espressif-latest/components/esp_system/port/soc/esp32c2/ |
D | clk.c | 212 common_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN0_REG); in esp_perip_clk_init() 213 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init() 214 wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); in esp_perip_clk_init()
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/hal_espressif-latest/components/esp_system/port/soc/esp32c3/ |
D | clk.c | 213 common_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN0_REG); in esp_perip_clk_init() 214 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init() 215 wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); in esp_perip_clk_init()
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/hal_espressif-latest/components/hal/esp32/include/hal/ |
D | rtc_cntl_ll.h | 104 uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); in rtc_cntl_ll_get_rtc_time() 105 t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; in rtc_cntl_ll_get_rtc_time()
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/hal_espressif-latest/components/esp_system/port/soc/esp32c6/ |
D | clk.c | 228 common_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN0_REG); in esp_perip_clk_init() 229 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init() 230 wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); in esp_perip_clk_init()
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/hal_espressif-latest/components/esp_system/port/soc/esp32h2/ |
D | clk.c | 224 common_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN0_REG); in esp_perip_clk_init() 225 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init() 226 wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); in esp_perip_clk_init()
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/hal_espressif-latest/components/esp_psram/esp32s3/ |
D | esp_psram_impl_quad.c | 161 uint32_t backup_usr = READ_PERI_REG(SPI_MEM_USER_REG(spi_num)); in psram_exec_cmd() 162 uint32_t backup_usr1 = READ_PERI_REG(SPI_MEM_USER1_REG(spi_num)); in psram_exec_cmd() 163 uint32_t backup_usr2 = READ_PERI_REG(SPI_MEM_USER2_REG(spi_num)); in psram_exec_cmd() 164 uint32_t backup_ctrl = READ_PERI_REG(SPI_MEM_CTRL_REG(spi_num)); in psram_exec_cmd()
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/hal_espressif-latest/components/esp_system/port/soc/esp32s3/ |
D | clk.c | 230 common_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN0_REG); in esp_perip_clk_init() 231 hwcrypto_perip_clk = ~READ_PERI_REG(SYSTEM_PERIP_CLK_EN1_REG); in esp_perip_clk_init() 232 wifi_bt_sdio_clk = ~READ_PERI_REG(SYSTEM_WIFI_CLK_EN_REG); in esp_perip_clk_init()
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/hal_espressif-latest/components/esp_hw_support/ |
D | rtc_wdt.c | 15 return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE; in rtc_wdt_get_protect_status() 110 time_tick = READ_PERI_REG(get_addr_reg(stage)); in rtc_wdt_get_timeout()
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/hal_espressif-latest/components/esp_psram/esp32/ |
D | esp_psram_impl_quad.c | 285 uint32_t mode_backup = (READ_PERI_REG(SPI_USER_REG(spi_num)) >> SPI_FWRITE_DUAL_S) & 0xf; in psram_cmd_recv_start() 286 …uint32_t rd_mode_backup = READ_PERI_REG(SPI_CTRL_REG(spi_num)) & (SPI_FREAD_DIO_M | SPI_FREAD_DUAL… in psram_cmd_recv_start() 296 while ( READ_PERI_REG(SPI_EXT2_REG(0)) != 0); in psram_cmd_recv_start() 301 while ((READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR)); in psram_cmd_recv_start() 317 *pRxData++ = READ_PERI_REG(SPI_W0_REG(spi_num) + (idx << 2)); in psram_cmd_recv_start() 329 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_config() 330 backup_usr[spi_num]=READ_PERI_REG(SPI_USER_REG(spi_num)); in psram_cmd_config() 331 backup_usr1[spi_num]=READ_PERI_REG(SPI_USER1_REG(spi_num)); in psram_cmd_config() 332 backup_usr2[spi_num]=READ_PERI_REG(SPI_USER2_REG(spi_num)); in psram_cmd_config() 397 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_end() [all …]
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/hal_espressif-latest/components/esp_hw_support/port/esp32h2/ |
D | rtc_time.c | 252 uint64_t t = READ_PERI_REG(LP_TIMER_MAIN_BUF0_LOW_REG); in rtc_time_get() 253 t |= ((uint64_t) READ_PERI_REG(LP_TIMER_MAIN_BUF0_HIGH_REG)) << 32; in rtc_time_get()
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/hal_espressif-latest/components/hal/esp32s3/include/hal/ |
D | rtc_cntl_ll.h | 173 uint64_t t = READ_PERI_REG(RTC_CNTL_TIME0_REG); in rtc_cntl_ll_get_rtc_time() 174 t |= ((uint64_t) READ_PERI_REG(RTC_CNTL_TIME1_REG)) << 32; in rtc_cntl_ll_get_rtc_time()
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/hal_espressif-latest/components/esp_psram/esp32s2/ |
D | esp_psram_impl_quad.c | 215 uint32_t backup_usr = READ_PERI_REG(SPI_MEM_USER_REG(spi_num)); in psram_exec_cmd() 216 uint32_t backup_usr1 = READ_PERI_REG(SPI_MEM_USER1_REG(spi_num)); in psram_exec_cmd() 217 uint32_t backup_usr2 = READ_PERI_REG(SPI_MEM_USER2_REG(spi_num)); in psram_exec_cmd() 218 uint32_t backup_ctrl = READ_PERI_REG(SPI_MEM_CTRL_REG(spi_num)); in psram_exec_cmd()
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