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Searched refs:ccm (Results 1 – 25 of 109) sorted by relevance

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/Zephyr-latest/dts/arm/nxp/
Dnxp_rt118x.dtsi66 ccm: ccm@4450000 { label
67 compatible = "nxp,imx-ccm-rev2";
76 clocks = <&ccm IMX_CCM_LPUART0102_CLK 0x7c 24>;
84 clocks = <&ccm IMX_CCM_LPUART0102_CLK 0x68 28>;
92 clocks = <&ccm IMX_CCM_LPUART0304_CLK 0x68 12>;
100 clocks = <&ccm IMX_CCM_LPUART0304_CLK 0x6c 24>;
108 clocks = <&ccm IMX_CCM_LPUART0506_CLK 0x74 2>;
116 clocks = <&ccm IMX_CCM_LPUART0506_CLK 0x74 6>;
124 clocks = <&ccm IMX_CCM_LPUART0708_CLK 0x7c 26>;
132 clocks = <&ccm IMX_CCM_LPUART0708_CLK 0x80 14>;
[all …]
Dnxp_rt11xx.dtsi98 clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0>;
108 clocks = <&ccm IMX_CCM_FLEXSPI2_CLK 0x0 0>;
132 clocks = <&ccm IMX_CCM_GPT_CLK 0x41 0>;
140 clocks = <&ccm IMX_CCM_GPT_CLK 0x42 0>;
148 clocks = <&ccm IMX_CCM_GPT_CLK 0x43 0>;
156 clocks = <&ccm IMX_CCM_GPT_CLK 0x44 0>;
164 clocks = <&ccm IMX_CCM_GPT_CLK 0x45 0>;
172 clocks = <&ccm IMX_CCM_QTMR1_CLK 0x0 0>;
180 clocks = <&ccm IMX_CCM_QTMR2_CLK 0x0 0>;
188 clocks = <&ccm IMX_CCM_QTMR3_CLK 0x0 0>;
[all …]
Dnxp_rt10xx.dtsi129 clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0x0>;
141 clocks = <&ccm IMX_CCM_FLEXSPI2_CLK 0x0 0x0>;
165 clocks = <&ccm IMX_CCM_GPT_CLK 0x68 24>;
172 clocks = <&ccm IMX_CCM_QTMR_CLK 0 0>;
199 clocks = <&ccm IMX_CCM_QTMR_CLK 0 0>;
226 clocks = <&ccm IMX_CCM_QTMR_CLK 0 0>;
253 clocks = <&ccm IMX_CCM_QTMR_CLK 0 0>;
276 ccm: ccm@400fc000 { label
277 compatible = "nxp,imx-ccm";
301 compatible = "nxp,imx-ccm-fnpll";
[all …]
Dnxp_imx8m_m4.dtsi133 ccm: ccm@30380000 { label
134 compatible = "nxp,imx-ccm";
145 clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
155 clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
165 clocks = <&ccm IMX_CCM_ECSPI3_CLK 0 0>;
173 clocks = <&ccm IMX_CCM_UART1_CLK 0x7c 24>;
181 clocks = <&ccm IMX_CCM_UART2_CLK 0x68 28>;
189 clocks = <&ccm IMX_CCM_UART3_CLK 0x68 12>;
197 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
Dnxp_imx8ml_m7.dtsi76 ccm: ccm@30380000 { label
77 compatible = "nxp,imx-ccm";
161 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
169 clocks = <&ccm IMX_CCM_UART1_CLK 0x7c 24>;
190 clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
200 clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
210 clocks = <&ccm IMX_CCM_ECSPI3_CLK 0 0>;
Dnxp_rt1010.dtsi34 &ccm {
117 clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0x0>;
134 clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>;
145 clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>;
164 clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
174 clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
203 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
213 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
223 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
233 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
[all …]
Dnxp_imx93_m33.dtsi53 ccm: ccm@44450000 { label
54 compatible = "nxp,imx-ccm-rev2";
95 clocks = <&ccm IMX_CCM_LPUART2_CLK 0x6c 24>;
Dnxp_rt1060.dtsi38 &ccm {
54 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
74 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
90 clocks = <&ccm IMX_CCM_FLEXIO2_3_CLK 0 0>;
98 clocks = <&ccm IMX_CCM_FLEXIO2_3_CLK 0 0>;
/Zephyr-latest/dts/arm64/nxp/
Dnxp_mimx93_a55.dtsi79 ccm: ccm@44450000 { label
80 compatible = "nxp,imx-ccm-rev2";
131 clocks = <&ccm IMX_CCM_LPUART1_CLK 0x6c 24>;
141 clocks = <&ccm IMX_CCM_LPUART2_CLK 0x6c 24>;
153 clocks = <&ccm IMX_CCM_LPI2C1_CLK 0x70 6>;
165 clocks = <&ccm IMX_CCM_LPI2C2_CLK 0x70 8>;
177 clocks = <&ccm IMX_CCM_LPI2C3_CLK 0x70 10>;
189 clocks = <&ccm IMX_CCM_LPI2C4_CLK 0x80 24>;
201 clocks = <&ccm IMX_CCM_LPI2C5_CLK 0x80 24>;
213 clocks = <&ccm IMX_CCM_LPI2C6_CLK 0x80 24>;
[all …]
Dnxp_mimx8mm_a53.dtsi152 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x6C 20>;
163 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x68 24>;
182 ccm: ccm@30380000 { label
183 compatible = "nxp,imx-ccm";
194 clocks = <&ccm IMX_CCM_UART2_CLK 0x6c 24>;
206 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
220 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
243 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
Dnxp_mimx8mp_a53.dtsi75 ccm: ccm@30380000 { label
76 compatible = "nxp,imx-ccm";
153 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x6C 20>;
164 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x68 24>;
174 clocks = <&ccm IMX_CCM_UART2_CLK 0x6c 24>;
186 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
195 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
218 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
Dnxp_mimx8mn_a53.dtsi153 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x6C 20>;
164 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x68 24>;
183 ccm: ccm@30380000 { label
184 compatible = "nxp,imx-ccm";
195 clocks = <&ccm IMX_CCM_UART2_CLK 0x6c 24>;
207 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
221 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
244 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/radio/
Dradio.c1229 void *radio_ccm_rx_pkt_set_ut(struct ccm *ccm, uint8_t phy, void *pkt) in radio_ccm_rx_pkt_set_ut() argument
1243 memcpy(ccm->key, key_local, sizeof(key_local)); in radio_ccm_rx_pkt_set_ut()
1257 ccm->iv[0] = 0x24; in radio_ccm_rx_pkt_set_ut()
1258 ccm->iv[1] = 0xAB; in radio_ccm_rx_pkt_set_ut()
1259 ccm->iv[2] = 0xDC; in radio_ccm_rx_pkt_set_ut()
1260 ccm->iv[3] = 0xBA; in radio_ccm_rx_pkt_set_ut()
1261 ccm->iv[4] = 0xBE; in radio_ccm_rx_pkt_set_ut()
1262 ccm->iv[5] = 0xBA; in radio_ccm_rx_pkt_set_ut()
1263 ccm->iv[6] = 0xAF; in radio_ccm_rx_pkt_set_ut()
1264 ccm->iv[7] = 0xDE; in radio_ccm_rx_pkt_set_ut()
[all …]
Dradio.h95 void *radio_ccm_rx_pkt_set(struct ccm *ccm, uint8_t phy, void *pkt);
96 void *radio_ccm_tx_pkt_set(struct ccm *ccm, void *pkt);
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio.h174 void *radio_ccm_rx_pkt_set(struct ccm *ccm, uint8_t phy, void *pkt);
175 void *radio_ccm_iso_rx_pkt_set(struct ccm *ccm, uint8_t phy, uint8_t pdu_type, void *pkt);
176 void *radio_ccm_tx_pkt_set(struct ccm *ccm, void *pkt);
177 void *radio_ccm_iso_tx_pkt_set(struct ccm *ccm, uint8_t pdu_type, void *pkt);
/Zephyr-latest/drivers/crypto/
Dcrypto_tc_shim.c104 struct tc_ccm_mode_struct ccm; in do_ccm_encrypt_mac() local
109 if (tc_ccm_config(&ccm, &data->session_key, nonce, in do_ccm_encrypt_mac()
118 op->in_len, &ccm) == TC_CRYPTO_FAIL) { in do_ccm_encrypt_mac()
129 memcpy(aead_op->tag, op->out_buf + op->in_len, ccm.mlen); in do_ccm_encrypt_mac()
136 op->out_len = op->in_len + ccm.mlen; in do_ccm_encrypt_mac()
144 struct tc_ccm_mode_struct ccm; in do_ccm_decrypt_auth() local
149 if (tc_ccm_config(&ccm, &data->session_key, nonce, in do_ccm_decrypt_auth()
169 &ccm) == TC_CRYPTO_FAIL) { in do_ccm_decrypt_auth()
/Zephyr-latest/soc/nxp/imx/imx8m/a53/
Dmmu_regions.c24 DT_REG_ADDR(DT_NODELABEL(ccm)),
25 DT_REG_SIZE(DT_NODELABEL(ccm)),
/Zephyr-latest/tests/drivers/build_all/video/
Dmimxrt1170_evk_mimxrt1176_cm7.overlay68 clocks = <&ccm IMX_CCM_MIPI_CSI2RX_ROOT_CLK 0 0>,
69 <&ccm IMX_CCM_MIPI_CSI2RX_UI_CLK 0 0>,
70 <&ccm IMX_CCM_MIPI_CSI2RX_ESC_CLK 0 0>;
/Zephyr-latest/dts/xtensa/nxp/
Dnxp_imx8m.dtsi84 ccm: ccm@30380000 { label
85 compatible = "nxp,imx-ccm";
138 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
/Zephyr-latest/subsys/bluetooth/controller/hal/
Dccm.h8 struct ccm { struct
/Zephyr-latest/soc/nxp/imx/imx9/imx93/a55/
Dmmu_regions.c21 MMU_REGION_FLAT_ENTRY("CCM", DT_REG_ADDR(DT_NODELABEL(ccm)), DT_REG_SIZE(DT_NODELABEL(ccm)),
/Zephyr-latest/samples/boards/st/ccm/
DCMakeLists.txt5 project(ccm) project
/Zephyr-latest/boards/phytec/phyboard_pollux/
Dphyboard_pollux_mimx8ml8_m7.dts33 clocks = <&ccm IMX_CCM_UART1_CLK 0x7c 24>;
47 clocks = <&ccm IMX_CCM_UART3_CLK 0x68 12>;
/Zephyr-latest/drivers/clock_control/
DKconfig.mcux_ccm11 Enable support for mcux ccm driver.
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/
Dlll_conn_iso.h24 struct ccm ccm; member

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