Lines Matching refs:ccm
98 clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0>;
108 clocks = <&ccm IMX_CCM_FLEXSPI2_CLK 0x0 0>;
132 clocks = <&ccm IMX_CCM_GPT_CLK 0x41 0>;
140 clocks = <&ccm IMX_CCM_GPT_CLK 0x42 0>;
148 clocks = <&ccm IMX_CCM_GPT_CLK 0x43 0>;
156 clocks = <&ccm IMX_CCM_GPT_CLK 0x44 0>;
164 clocks = <&ccm IMX_CCM_GPT_CLK 0x45 0>;
172 clocks = <&ccm IMX_CCM_QTMR1_CLK 0x0 0>;
180 clocks = <&ccm IMX_CCM_QTMR2_CLK 0x0 0>;
188 clocks = <&ccm IMX_CCM_QTMR3_CLK 0x0 0>;
196 clocks = <&ccm IMX_CCM_QTMR4_CLK 0x0 0>;
199 ccm: ccm@40cc0000 { label
200 compatible = "nxp,imx-ccm-rev2";
312 clocks = <&ccm IMX_CCM_LPI2C1_CLK 0x70 6>;
323 clocks = <&ccm IMX_CCM_LPI2C2_CLK 0x70 8>;
334 clocks = <&ccm IMX_CCM_LPI2C3_CLK 0x70 10>;
345 clocks = <&ccm IMX_CCM_LPI2C4_CLK 0x80 24>;
356 clocks = <&ccm IMX_CCM_LPI2C5_CLK 0x80 24>;
367 clocks = <&ccm IMX_CCM_LPI2C6_CLK 0x80 24>;
418 clocks = <&ccm IMX_CCM_LPSPI1_CLK 0x6c 0>;
428 clocks = <&ccm IMX_CCM_LPSPI2_CLK 0x6c 2>;
438 clocks = <&ccm IMX_CCM_LPSPI3_CLK 0x6c 4>;
448 clocks = <&ccm IMX_CCM_LPSPI4_CLK 0x6c 6>;
458 clocks = <&ccm IMX_CCM_LPSPI5_CLK 0x6c 6>;
468 clocks = <&ccm IMX_CCM_LPSPI6_CLK 0x6c 6>;
477 clocks = <&ccm IMX_CCM_LPUART1_CLK 0x7c 24>;
485 clocks = <&ccm IMX_CCM_LPUART2_CLK 0x68 28>;
493 clocks = <&ccm IMX_CCM_LPUART3_CLK 0x68 12>;
501 clocks = <&ccm IMX_CCM_LPUART4_CLK 0x6c 24>;
509 clocks = <&ccm IMX_CCM_LPUART5_CLK 0x74 2>;
517 clocks = <&ccm IMX_CCM_LPUART6_CLK 0x74 6>;
525 clocks = <&ccm IMX_CCM_LPUART7_CLK 0x7c 26>;
533 clocks = <&ccm IMX_CCM_LPUART8_CLK 0x80 14>;
541 clocks = <&ccm IMX_CCM_LPUART9_CLK 0x80 14>;
549 clocks = <&ccm IMX_CCM_LPUART10_CLK 0x80 14>;
557 clocks = <&ccm IMX_CCM_LPUART11_CLK 0x80 14>;
565 clocks = <&ccm IMX_CCM_LPUART12_CLK 0x80 14>;
579 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
589 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
599 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
609 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
625 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
635 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
645 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
655 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
671 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
681 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
691 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
701 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
717 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
727 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
737 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
747 clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
757 clocks = <&ccm IMX_CCM_FLEXIO1_CLK 0 0>;
765 clocks = <&ccm IMX_CCM_FLEXIO2_CLK 0 0>;
772 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
791 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
798 clocks = <&ccm IMX_CCM_ENET1G_CLK 0 0>;
818 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;
867 clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
879 clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
903 clocks = <&ccm IMX_CCM_MIPI_CSI2RX_ROOT_CLK 0 0>,
904 <&ccm IMX_CCM_MIPI_CSI2RX_UI_CLK 0 0>,
905 <&ccm IMX_CCM_MIPI_CSI2RX_ESC_CLK 0 0>;
929 clocks = <&ccm IMX_CCM_CAN1_CLK 0x68 14>;
939 clocks = <&ccm IMX_CCM_CAN2_CLK 0x68 18>;
949 clocks = <&ccm IMX_CCM_CAN3_CLK 0x84 6>;
990 clocks = <&ccm IMX_CCM_LPADC1_CLK 0 0>;
1006 clocks = <&ccm IMX_CCM_LPADC2_CLK 0 0>;
1054 clocks = <&ccm IMX_CCM_EDMA_CLK 0x7C 0x000000C0>;
1074 clocks = <&ccm IMX_CCM_EDMA_LPSR_CLK 0x7C 0x000000C0>;
1104 clocks = <&ccm IMX_CCM_SAI1_CLK 0x2004 4>;
1127 clocks = <&ccm IMX_CCM_SAI2_CLK 0x2084 4>;
1150 clocks = <&ccm IMX_CCM_SAI3_CLK 0x2104 4>;
1173 clocks = <&ccm IMX_CCM_SAI4_CLK 0x2184 6>;
1247 clocks = <&ccm IMX_CCM_PIT_CLK 0x0 0>;
1282 clocks = <&ccm IMX_CCM_PIT1_CLK 0x0 0>;