1/*
2 * Copyright (c) 2019, Linaro
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <nxp/nxp_rt10xx.dtsi>
8
9&flexram {
10	flexram,num-ram-banks = <4>;
11	/* default fuse */
12	flexram,bank-spec = <FLEXRAM_OCRAM>,
13			     <FLEXRAM_OCRAM>,
14			     <FLEXRAM_DTCM>,
15			     <FLEXRAM_ITCM>;
16};
17
18&sysclk {
19	clock-frequency = <500000000>;
20};
21
22&itcm {
23	reg = <0x00000000 DT_SIZE_K(32)>;
24};
25
26&dtcm {
27	reg = <0x20000000 DT_SIZE_K(32)>;
28};
29
30&ocram {
31	reg = <0x20200000 DT_SIZE_K(64)>;
32};
33
34&ccm {
35	/delete-node/ arm-podf;
36
37	ipg-podf {
38		clock-div = <4>;
39	};
40};
41
42&gpio1 {
43	interrupts = <70 0>, <71 0>;
44};
45
46&gpio5 {
47	interrupts = <73 0>;
48};
49
50&gpt_hw_timer {
51	interrupts = <30 0>;
52};
53
54&gpt2 {
55	interrupts = <31 0>;
56	gptfreq = <12500000>;
57};
58
59&edma0 {
60	/* Each channel has separate interrupt entry */
61	irq-shared-offset = <0>;
62	dma-channels = <16>;
63};
64
65/ {
66	soc {
67		/* Remove GPIO3-GPIO9, they don't exist on RT1010 */
68		/delete-node/ gpio@401c0000;
69		/delete-node/ gpio@401c4000;
70		/delete-node/ gpio@42000000;
71		/delete-node/ gpio@42004000;
72		/delete-node/ gpio@42008000;
73		/delete-node/ gpio@4200c000;
74
75		/* Fixup GPIO2 its a different location on RT1010 */
76		/delete-node/ gpio@401bc000;
77
78		gpio2: gpio@42000000 {
79			compatible = "nxp,imx-gpio";
80			reg = <0x42000000 0x4000>;
81			interrupts = <72 0>;
82			gpio-controller;
83			#gpio-cells = <2>;
84			pinmux = <&iomuxc_gpio_sd_00_gpio2_io00>,
85				<&iomuxc_gpio_sd_01_gpio2_io01>,
86				<&iomuxc_gpio_sd_02_gpio2_io02>,
87				<&iomuxc_gpio_sd_03_gpio2_io03>,
88				<&iomuxc_gpio_sd_04_gpio2_io04>,
89				<&iomuxc_gpio_sd_05_gpio2_io05>,
90				<&iomuxc_gpio_sd_06_gpio2_io06>,
91				<&iomuxc_gpio_sd_07_gpio2_io07>,
92				<&iomuxc_gpio_sd_08_gpio2_io08>,
93				<&iomuxc_gpio_sd_09_gpio2_io09>,
94				<&iomuxc_gpio_sd_10_gpio2_io10>,
95				<&iomuxc_gpio_sd_11_gpio2_io11>,
96				<&iomuxc_gpio_sd_12_gpio2_io12>,
97				<&iomuxc_gpio_sd_13_gpio2_io13>;
98		};
99
100		/* Remove Quad TImers, they don't exist on RT1010 */
101		/delete-node/ qtmr@401dc000;
102		/delete-node/ qtmr@401e0000;
103		/delete-node/ qtmr@401e4000;
104		/delete-node/ qtmr@401e8000;
105
106		/* Fixup FlexSPI its a different location on RT1010 */
107		/delete-node/ spi@402a8000;
108		flexspi: spi@400a0000 {
109			compatible = "nxp,imx-flexspi";
110			reg = <0x400a0000 0x4000>;
111			interrupts = <26 0>;
112			#address-cells = <1>;
113			#size-cells = <0>;
114			ahb-bufferable;
115			ahb-cacheable;
116			status = "disabled";
117			clocks = <&ccm IMX_CCM_FLEXSPI_CLK 0x0 0x0>;
118		};
119
120		/* Remove SEMC, it doesn't exist on RT1010 */
121		/delete-node/ semc0@402f0000;
122
123		/* Fixup LPI2C1 and LPI2C2, they have different base addr on RT1010 */
124		/delete-node/ i2c@403f0000;
125		/delete-node/ i2c@403f4000;
126
127		lpi2c1: i2c@401a4000 {
128			compatible = "nxp,lpi2c";
129			clock-frequency = <I2C_BITRATE_STANDARD>;
130			#address-cells = <1>;
131			#size-cells = <0>;
132			reg = <0x401a4000 0x4000>;
133			interrupts = <28 0>;
134			clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>;
135			status = "disabled";
136		};
137
138		lpi2c2: i2c@401a8000 {
139			compatible = "nxp,lpi2c";
140			clock-frequency = <I2C_BITRATE_STANDARD>;
141			#address-cells = <1>;
142			#size-cells = <0>;
143			reg = <0x401a8000 0x4000>;
144			interrupts = <29 0>;
145			clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>;
146			status = "disabled";
147		};
148
149		/* Remove LPI2C3 & LPI2C4, they don't exist on RT1010 */
150		/delete-node/ i2c@403f8000;
151		/delete-node/ i2c@403fc000;
152
153		/* Remove LCDIF, it doesn't exist on RT1010 */
154		/delete-node/ display-controller@402b8000;
155
156		/* Fixup LPSPI1 and LPSPI2, they have different base addr on RT1010 */
157		/delete-node/ spi@40394000;
158		/delete-node/ spi@40398000;
159		lpspi1: spi@40194000 {
160			compatible = "nxp,lpspi";
161			reg = <0x40194000 0x4000>;
162			interrupts = <32 3>;
163			status = "disabled";
164			clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
165			#address-cells = <1>;
166			#size-cells = <0>;
167		};
168
169		lpspi2: spi@40198000 {
170			compatible = "nxp,lpspi";
171			reg = <0x40198000 0x4000>;
172			interrupts = <33 3>;
173			status = "disabled";
174			clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
175			#address-cells = <1>;
176			#size-cells = <0>;
177		};
178
179		/* Remove LPUART5-8, they don't exist on RT1010 */
180		/delete-node/ uart@40194000;
181		/delete-node/ uart@40198000;
182		/delete-node/ uart@4019c000;
183		/delete-node/ uart@401a0000;
184
185		/* Remove ADC2, it doesn't exist on RT1010 */
186		/delete-node/ adc@400C8000;
187
188		/* RT1010 has only one flexSPI controller */
189		/delete-node/ spi@402a4000;
190
191		/* Fixup FlexPWM1 it has different base addr and interrupt numbers on RT1010 */
192		/delete-node/ flexpwm@403dc000;
193		flexpwm1: flexpwm@401cc000 {
194			compatible = "nxp,flexpwm";
195			reg = <0x401cc000 0x4000>;
196			interrupts = <38 0>;
197
198			flexpwm1_pwm0: pwm0 {
199				compatible = "nxp,imx-pwm";
200				index = <0>;
201				interrupts = <34 0>;
202				#pwm-cells = <3>;
203				clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
204				nxp,prescaler = <128>;
205				status = "disabled";
206			};
207
208			flexpwm1_pwm1: pwm1 {
209				compatible = "nxp,imx-pwm";
210				index = <1>;
211				interrupts = <35 0>;
212				#pwm-cells = <3>;
213				clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
214				nxp,prescaler = <128>;
215				status = "disabled";
216			};
217
218			flexpwm1_pwm2: pwm2 {
219				compatible = "nxp,imx-pwm";
220				index = <2>;
221				interrupts = <36 0>;
222				#pwm-cells = <3>;
223				clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
224				nxp,prescaler = <128>;
225				status = "disabled";
226			};
227
228			flexpwm1_pwm3: pwm3 {
229				compatible = "nxp,imx-pwm";
230				index = <3>;
231				interrupts = <37 0>;
232				#pwm-cells = <3>;
233				clocks = <&ccm IMX_CCM_PWM_CLK 0 0>;
234				nxp,prescaler = <128>;
235				status = "disabled";
236			};
237		};
238		/* Remove FlexPWM2-4, they don't exist on RT1010 */
239		/delete-node/ flexpwm@403e0000;
240		/delete-node/ flexpwm@403e4000;
241		/delete-node/ flexpwm@403e8000;
242
243		/* Remove Ethernet, it doesn't exist on RT1010 */
244		/delete-node/ enet@402d8000;
245
246		/* Fixup USB it has different base addr and interrupt numbers on RT1010 */
247		/delete-node/ usbd@402e0000;
248		usb1: usbd@400e4000 {
249			compatible = "nxp,ehci";
250			reg = <0x400e4000 0x200>;
251			interrupts = <25 1>;
252			interrupt-names = "usb_otg";
253			clocks = <&usbclk>;
254			num-bidir-endpoints = <8>;
255			status = "disabled";
256		};
257
258		/* Remove USB2, it doesn't exist on RT1010 */
259		/delete-node/ usbd@402e0200;
260
261		/* Remove USDHC, they don't exist on RT1010 */
262		/delete-node/ usdhc@402c0000;
263		/delete-node/ usdhc@402c4000;
264
265		/* Remove CSI, it doesn't exist on RT1010 */
266		/delete-node/ csi@402bc000;
267
268		/* Remove FLEXCAN, they don't exist on RT1010 */
269		/delete-node/ can@401d0000;
270		/delete-node/ can@401d4000;
271		/delete-node/ can@401d8000;
272
273		/* Remove WDOG2, it doesn't exist on RT1010 */
274		/delete-node/ wdog@400d0000;
275
276		/* Fix SAI1, 3, it has different base addr on RT1010 */
277		/delete-node/ sai@40384000;
278		/delete-node/ sai@4038c000;
279		sai1: sai@401e0000 {
280			compatible = "nxp,mcux-i2s";
281			#address-cells = <1>;
282			#size-cells = <0>;
283			#pinmux-cells = <2>;
284			reg = <0x401e0000 0x4000>;
285			clocks = <&ccm IMX_CCM_SAI1_CLK 0x7C 18>;
286			/* Source clock from Audio PLL */
287			clock-mux = <2>;
288			/* Audio PLL Output Frequency is determined by:
289			 * (Fref * (DIV_SELECT + NUM/DENOM)) / POST_DIV
290			 * = (24MHz * (32 + 77 / 100)) / 1 = 786.48 MHz
291			 */
292		       pll-clocks = <&anatop 0x70 0xC000 0>,
293				      <&anatop 0x70 0x7F 32>,
294				      <&anatop 0x70 0x180000 1>,
295				      <&anatop 0x80 0x3FFFFFFF 77>,
296				      <&anatop 0x90 0x3FFFFFFF 100>;
297			pll-clock-names = "src", "lp", "pd", "num", "den";
298			/* The maximum input frequency into the SAI mclk input is 300MHz
299			 * Based on this requirement, pre-div must be at least 3
300			 * The pre-div and post-div are one less than the actual divide-by amount.
301			 * A pre-div value of 0x1 results in a pre-divider of
302			 * (1+1) = 2
303			 */
304			pre-div = <0x3>;
305			podf = <0x0F>;
306			pinmuxes = <&iomuxcgpr 0x4 0x80000>;
307			interrupts = <56 0>;
308			dmas = <&edma0 0 19>, <&edma0 0 20>;
309			dma-names = "rx", "tx";
310			/* This translates to SAIChannelMask (fsl_sai.c) and
311			 * cannot be 0
312			 */
313			nxp,tx-channel = <1>;
314			nxp,tx-dma-channel = <0>;
315			nxp,rx-dma-channel = <1>;
316			status = "disabled";
317		};
318
319		sai3: sai@401e8000 {
320			compatible = "nxp,mcux-i2s";
321			#address-cells = <1>;
322			#size-cells = <0>;
323			#pinmux-cells = <2>;
324			reg = <0x401e8000 0x4000>;
325			clocks = <&ccm IMX_CCM_SAI3_CLK 0x7C 22>;
326			/* Source clock from Audio PLL */
327			clock-mux = <2>;
328			pre-div = <0>;
329			podf = <63>;
330			pll-clocks = <&anatop 0x70 0xC000 0>,
331				   <&anatop 0x70 0x7F 32>,
332				   <&anatop 0x70 0x180000 1>,
333				   <&anatop 0x80 0x3FFFFFFF 77>,
334				   <&anatop 0x90 0x3FFFFFFF 100>;
335			pll-clock-names = "src", "lp", "pd", "num", "den";
336			pinmuxes = <&iomuxcgpr 0x4 0x200000>;
337			interrupts = <58 0>, <59 0>;
338			dmas = <&edma0 0 83>, <&edma0 0 84>;
339			dma-names = "rx", "tx";
340			nxp,tx-channel = <0>;
341			nxp,tx-dma-channel = <5>;
342			nxp,rx-dma-channel = <6>;
343			status = "disabled";
344		};
345
346		/* Remove SAI2, it doesn't exist on RT1010 */
347		/delete-node/ sai@40388000;
348	};
349};
350
351/* RT1015 only has two LPSPI blocks */
352/delete-node/ &lpspi3;
353/delete-node/ &lpspi4;
354
355
356&gpio1{
357	pinmux = <&iomuxc_gpio_00_gpiomux_io00>,
358		<&iomuxc_gpio_01_gpiomux_io01>,
359		<&iomuxc_gpio_02_gpiomux_io02>,
360		<&iomuxc_gpio_03_gpiomux_io03>,
361		<&iomuxc_gpio_04_gpiomux_io04>,
362		<&iomuxc_gpio_05_gpiomux_io05>,
363		<&iomuxc_gpio_06_gpiomux_io06>,
364		<&iomuxc_gpio_07_gpiomux_io07>,
365		<&iomuxc_gpio_08_gpiomux_io08>,
366		<&iomuxc_gpio_09_gpiomux_io09>,
367		<&iomuxc_gpio_10_gpiomux_io10>,
368		<&iomuxc_gpio_11_gpiomux_io11>,
369		<&iomuxc_gpio_12_gpiomux_io12>,
370		<&iomuxc_gpio_13_gpiomux_io13>,
371		<&iomuxc_gpio_ad_00_gpiomux_io14>,
372		<&iomuxc_gpio_ad_01_gpiomux_io15>,
373		<&iomuxc_gpio_ad_02_gpiomux_io16>,
374		<&iomuxc_gpio_ad_03_gpiomux_io17>,
375		<&iomuxc_gpio_ad_04_gpiomux_io18>,
376		<&iomuxc_gpio_ad_05_gpiomux_io19>,
377		<&iomuxc_gpio_ad_06_gpiomux_io20>,
378		<&iomuxc_gpio_ad_07_gpiomux_io21>,
379		<&iomuxc_gpio_ad_08_gpiomux_io22>,
380		<&iomuxc_gpio_ad_09_gpiomux_io23>,
381		<&iomuxc_gpio_ad_10_gpiomux_io24>,
382		<&iomuxc_gpio_ad_11_gpiomux_io25>,
383		<&iomuxc_gpio_ad_12_gpiomux_io26>,
384		<&iomuxc_gpio_ad_13_gpiomux_io27>,
385		<&iomuxc_gpio_ad_14_gpiomux_io28>;
386};
387
388&gpio5{
389	pinmux = <&iomuxc_snvs_pmic_on_req_gpio5_io00>;
390};
391
392&pit0 {
393	interrupts = <24 0>;
394};
395