1 /* 2 * Copyright 2022 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <zephyr/arch/arm64/arm_mmu.h> 8 #include <zephyr/devicetree.h> 9 #include <zephyr/sys/util.h> 10 11 static const struct arm_mmu_region mmu_regions[] = { 12 13 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0), 14 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0), 15 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 16 17 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1), 18 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1), 19 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 20 21 MMU_REGION_FLAT_ENTRY("CCM", DT_REG_ADDR(DT_NODELABEL(ccm)), DT_REG_SIZE(DT_NODELABEL(ccm)), 22 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 23 24 MMU_REGION_FLAT_ENTRY("ANA_PLL", DT_REG_ADDR(DT_NODELABEL(ana_pll)), 25 DT_REG_SIZE(DT_NODELABEL(ana_pll)), 26 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 27 28 MMU_REGION_FLAT_ENTRY("IOMUXC", DT_REG_ADDR(DT_NODELABEL(iomuxc)), 29 DT_REG_SIZE(DT_NODELABEL(iomuxc)), 30 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 31 32 MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(nxp_lpuart, 33 (MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS)) 34 35 MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(nxp_flexcan, 36 (MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS)) 37 38 #if CONFIG_SOF 39 MMU_REGION_FLAT_ENTRY("MU2_A", DT_REG_ADDR(DT_NODELABEL(mu2_a)), 40 DT_REG_SIZE(DT_NODELABEL(mu2_a)), 41 MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS), 42 43 MMU_REGION_FLAT_ENTRY("OUTBOX", DT_REG_ADDR(DT_NODELABEL(outbox)), 44 DT_REG_SIZE(DT_NODELABEL(outbox)), MT_NORMAL | MT_P_RW_U_NA | MT_NS), 45 46 MMU_REGION_FLAT_ENTRY("INBOX", DT_REG_ADDR(DT_NODELABEL(inbox)), 47 DT_REG_SIZE(DT_NODELABEL(inbox)), MT_NORMAL | MT_P_RW_U_NA | MT_NS), 48 49 MMU_REGION_FLAT_ENTRY("STREAM", DT_REG_ADDR(DT_NODELABEL(stream)), 50 DT_REG_SIZE(DT_NODELABEL(stream)), MT_NORMAL | MT_P_RW_U_NA | MT_NS), 51 52 MMU_REGION_FLAT_ENTRY("HOST_RAM", DT_REG_ADDR(DT_NODELABEL(host_ram)), 53 DT_REG_SIZE(DT_NODELABEL(host_ram)), 54 MT_NORMAL | MT_P_RW_U_NA | MT_NS), 55 #endif /* CONFIG_SOF */ 56 }; 57 58 const struct arm_mmu_config mmu_config = { 59 .num_regions = ARRAY_SIZE(mmu_regions), 60 .mmu_regions = mmu_regions, 61 }; 62
