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/Zephyr-latest/dts/bindings/sdhc/
Dsdhc.yaml2 # SPDX-License-Identifier: Apache-2.0
11 max-current-330:
15 Max drive current in mA at 3.3V. A value of zero indicates no maximum
18 max-current-300:
22 Max drive current in mA at 3.0V. A value of zero indicates no maximum
25 max-current-180:
29 Max drive current in mA at 1.8V. A value of zero indicates no maximum
32 max-bus-freq:
39 min-bus-freq:
46 power-delay-ms:
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/Zephyr-latest/dts/bindings/sensor/
Dti,fdc2x1x.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 sd-gpios:
12 type: phandle-array
18 intb-gpios:
19 type: phandle-array
28 Set to identify the sensor as FDC2114 or FDC2214 (4-channel version)
33 Set the Auto-Scan Mode.
36 "active-channel" (single channel mode).
38 true = Auto-Scan conversions as selected by "rr-sequence"
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/Zephyr-latest/dts/bindings/pinctrl/
Dpincfg-node.yaml2 # SPDX-License-Identifier: Apache-2.0
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
31 bias-pull-up:
33 description: enable pull-up resistor
35 bias-pull-down:
37 description: enable pull-down resistor
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Dite,it8xxx2-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined pins and functions for the SoC used by the board */
25 #include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
31 gpio-voltage = "1p8";
35 gpio-voltage = "1v8";
40 bias-pull-up;
51 To link pin configurations with a device, use a pinctrl-N property for some
54 #include "board-pinctrl.dtsi"
57 pinctrl-0 = <&uart1_rx_pb0_default &uart1_tx_pb1_default>;
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Dti,cc13xx-cc26xx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
29 - drive-strength: Minimum current that can be sourced from the pin.
30 - input-enable: enable input.
31 - input-schmitt-enable: enable input schmitt circuit.
32 - ti,input-edge-detect: enable and configure edge detection interrupts
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Datmel,sam0-pinctrl.yaml2 # Copyright (c) 2021-2022, Gerson Fernando Budke
3 # SPDX-License-Identifier: Apache-2.0
10 to route SERCOM0 as UART were RX to pin PAD1 and enable the pull-up resistor
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/samr21g-pinctrl.h>
42 /* both PA5 and PA7 have pull-up enabled */
43 bias-pull-up;
57 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
60 - bias-pull-up: Enable pull-up resistor.
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Dnxp,imx8m-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "40-ohm";
16 slew-rate = "slow";
20 Both pins will be configured with a slow slew rate, and maximum drive
26 input-schmitt-enable: HYS=1
27 bias-pull-up: PUE=1
28 drive-open-drain: ODE=1
29 slew-rate: SRE=<enum_idx>
30 drive-strength: DSE=<enum_idx>
31 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
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Drenesas,rzg-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl_rzg3s.h>
10 device-pinmux {
15 drive-strength = <1>;
18 device-spins {
20 input-enable;
22 drive-strength = <2>;
27 compatible: renesas,rzg-pinctrl
34 reg-names:
37 child-binding:
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Dnxp,mcux-rt-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "r0-6";
16 slew-rate = "slow";
17 nxp,speed = "100-mhz";
21 Both pins will be configured with a weak latch, drive strength of "r0-6",
26 input-schmitt-enable: HYS=1
27 drive-open-drain: ODE=1
28 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
29 bias-pull-down: PUE=1, PUS=<bias-pull-down-value>
30 bias-pull-up: PUE=1, PUS=<bias-pull-up-value>
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/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Dnordic-nrf-gpio.h4 * SPDX-License-Identifier: Apache-2.0
10 * @brief nRF-specific GPIO Flags
11 * @defgroup gpio_interface_nrf nRF-specific GPIO Flags
17 * @name nRF GPIO drive flags
18 * @brief nRF GPIO drive flags
20 * Standard (S) or High (H) drive modes can be applied to both pin levels, 0 or
21 * 1. High drive mode will increase current capabilities of the pin (refer to
24 * When the pin is configured to operate in open-drain mode (wired-and), the
25 * drive mode can only be selected for the 0 level (1 is disconnected).
26 * Similarly, when the pin is configured to operate in open-source mode
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/Zephyr-latest/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
2 # SPDX-License-Identifier: Apache-2.0
7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a
8 unique two-wire bus, made up of one clock line and one data line with speeds
9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
20 std-clk-slew-lim = <0>;
21 std-clk-strength-low = "0.5";
22 std-data-slew-lim = <0>;
23 std-data-strength-low = "0.5";
25 hs-clk-slew-lim = <0>;
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/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dxmc45_relax_kit.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <zephyr/dt-bindings/dma/infineon-xmc4xxx-dma.h>
6 compatible = "infineon,xmc4xxx-uart";
7 current-speed = <921600>;
8 pinctrl-0 = <&uart_tx_p5_0_u2c0 &uart_rx_p5_1_u2c0>;
9 pinctrl-names = "default";
10 input-src = "DX0G";
12 interrupt-names = "tx", "rx";
14 dma-names = "tx", "rx";
15 fifo-start-offset = <0>;
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Dxmc47_relax_kit.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <zephyr/dt-bindings/dma/infineon-xmc4xxx-dma.h>
6 compatible = "infineon,xmc4xxx-uart";
9 /delete-property/ scl-src;
10 /delete-property/ sda-src;
12 current-speed = <921600>;
14 interrupt-names = "tx", "rx";
16 dma-names = "tx", "rx";
17 pinctrl-0 = <&uart_tx_p3_15_u1c1 &uart_rx_p3_14_u1c1>;
18 pinctrl-names = "default";
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Dek_ra8m1.overlay3 * SPDX-License-Identifier: Apache-2.0
11 drive-strength = "medium";
21 pinctrl-0 = <&sci2_default>;
22 pinctrl-names = "default";
25 current-speed = <115200>;
/Zephyr-latest/dts/bindings/clock/
Dnordic,nrf-auxpll.yaml2 # SPDX-License-Identifier: Apache-2.0
9 f_out = ((R + A * 2^(-16)) * f_src) / B
13 - A: nordic,frequency
14 - B: nordic,outdiv
15 - R: nordic,range (3=low, 4=mid, 5=high, 6=statichigh)
16 - f_src: Source frequency, given by clocks
18 compatible: "nordic,nrf-auxpll"
21 - base.yaml
22 - clock-controller.yaml
23 - nordic-nrf-ficr-client.yaml
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/Zephyr-latest/boards/nxp/mimxrt685_evk/
Dmimxrt685_evk-pinctrl.dtsi3 * from MIMXRT685-EVK.mex
6 * SPDX-License-Identifier: Apache-2.0
10 #include <nxp/nxp_imx/rt/MIMXRT685SFVKB-pinctrl.h>
16 input-enable;
17 slew-rate = "normal";
18 drive-strength = "normal";
22 slew-rate = "normal";
23 drive-strength = "normal";
30 input-enable;
31 slew-rate = "normal";
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/Zephyr-latest/dts/bindings/gpio/
Dadi,max14906-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14906-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
27 type: phandle-array
28 sync-gpios:
31 type: phandle-array
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Dadi,max14916-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14916-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
27 type: phandle-array
28 sync-gpios:
31 type: phandle-array
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/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/
Dcy8ckit_062s2_ai.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit";
18 zephyr,shell-uart = &uart5;
30 compatible = "gpio-leds";
42 compatible = "gpio-keys";
53 clock-frequency = <100000000>;
57 clock-div = <1>;
62 * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz
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/Zephyr-latest/boards/shields/renesas_us159_da14531evz/boards/
Dek_ra8m1.overlay4 * SPDX-License-Identifier: Apache-2.0
12 drive-strength = "medium";
24 pinctrl-0 = <&sci0_default>;
25 pinctrl-names = "default";
28 current-speed = <115200>;
29 hw-flow-control;
/Zephyr-latest/boards/nxp/imx8mp_evk/
Dimx8mp_evk_mimx8ml8_adsp.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <nxp/nxp_imx/mimx8ml8dvnlz-pinctrl.dtsi>
20 zephyr,shell-uart = &uart4;
29 bias-pull-up;
30 slew-rate = "slow";
31 drive-strength = "x1";
38 current-speed = <115200>;
39 pinctrl-0 = <&uart4_default>;
40 pinctrl-names = "default";
/Zephyr-latest/dts/bindings/regulator/
Dnordic,npm1300-regulator.yaml2 # SPDX-License-Identifier: Apache-2.0
16 compatible = "nordic,npm1300-regulator";
33 compatible: "nordic,npm1300-regulator"
38 dvs-gpios:
39 type: phandle-array
42 Set_dvs_mode will drive these pins as follows:
45 DVS mode 3 will drive the first and second pins
47 The effect of the mode change is defined by the enable-gpios
50 child-binding:
52 - name: regulator.yaml
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/Zephyr-latest/samples/bluetooth/hci_uart_3wire/boards/
Dnrf5340dk_nrf5340_cpunet_df.overlay4 * SPDX-License-Identifier: Apache-2.0
8 compatible = "nordic,nrf-uarte";
9 current-speed = <1000000>;
18 dfe-antenna-num = <10>;
22 dfe-pdu-antenna = <0x0>;
26 * drive antenna switching when AoD is enabled.
28 dfegpio0-gpios = <&gpio0 4 0>;
29 dfegpio1-gpios = <&gpio0 5 0>;
30 dfegpio2-gpios = <&gpio0 6 0>;
31 dfegpio3-gpios = <&gpio0 7 0>;
Dnrf52833dk_nrf52833_df.overlay4 * SPDX-License-Identifier: Apache-2.0
8 compatible = "nordic,nrf-uarte";
9 current-speed = <1000000>;
18 dfe-antenna-num = <10>;
22 dfe-pdu-antenna = <0x0>;
26 * drive antenna switching when AoD is enabled.
28 dfegpio0-gpios = <&gpio0 3 0>;
29 dfegpio1-gpios = <&gpio0 4 0>;
30 dfegpio2-gpios = <&gpio0 28 0>;
31 dfegpio3-gpios = <&gpio0 29 0>;
/Zephyr-latest/boards/microchip/mec172xmodular_assy6930/
Dmec172xmodular_assy6930.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
28 pwm-0 = &pwm0;
32 compatible = "gpio-leds";
49 clock-frequency = <96000000>;
77 current-speed = <115200>;
78 pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
79 pinctrl-names = "default";
84 pinctrl-0 = <&adc00_gpio200 &adc03_gpio203
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