# Copyright (c) 2024 Epam Systems
# Copyright (c) 2024 Renesas Electronics Corporation
# SPDX-License-Identifier: Apache-2.0

description: |
  Below generic example shows of supported pinctrl definitions:

    #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl_rzg3s.h>
    example_pins: device_pin {
        device-pinmux {
          pinmux = <RZG_PINMUX(PORT_08, 1, 5)>,
                   <RZG_PINMUX(PORT_08, 2, 5)>;
          bias_pull_up;
          renesas,filter = RZG_FILTER_SET(RZG_FILNUM_8_STAGE,RZG_FILCLKSEL_DIV_18000);
          drive-strength = <1>;
        };

        device-spins {
          pins = <BSP_IO_XSPI_IO0>, <BSP_IO_XSPI_IO4>;
          input-enable;
          renesas,filter = RZG_FILTER_SET(RZG_FILNUM_8_STAGE,RZG_FILCLKSEL_DIV_18000);
          drive-strength = <2>;
        };
      };


compatible: renesas,rzg-pinctrl

include: base.yaml
properties:
  reg:
    required: true

  reg-names:
    required: true

child-binding:
  description: |
    This RZG pins mux/cfg nodes description.

  child-binding:
    description: |
      The RZG pinmux/pincfg configuration nodes description.

    include:
    - name: pincfg-node.yaml
      property-allowlist:
      - bias-disable
      - bias-high-impedance
      - bias-pull-down
      - bias-pull-up
      - bias-pull-pin-default
      - drive-strength
      - input-enable
      - input-disable
      - output-enable
      - power-source
      - low-power-enable
      - low-power-disable

    properties:
      pinmux:
        type: array
        description: |
          Pinmux configuration node.
          Values are constructed from GPIO port number, pin number, and
          alternate function configuration number using the RZG_PINMUX()
          helper macro in pinctrl_rzg.h

      pins:
        type: array
        description: |
          Special Purpose pins configuration node.
          Values are define in pinctrl_rzg.h.
          Ex: BSP_IO_XSPI_IO0,BSP_IO_I3C_SCL,...

      drive-strength:
        type: int
        default: 0
        description: |
          Maximum sink or source current in mA for pin which shell be selected
          depending on device and pin group.

      renesas,filter:
        type: int
        default: 0
        description: |
          Digital Noise Filter configuration for a pin which shell be defined
          using RZG_FILTER_SET() helper macro in pinctrl_rzg.h to specify
          FILNUM_m and FILCLKSEL_m. With 24Mhz external clock:
          - min debounce time will be 166.666ns for FILNUM_m=0 and FILCLKSEL_m=0
          - max debounce time will be 24ms for FILNUM_m=3 and FILCLKSEL_m=3.
          This property intentionally redefined to avoid unnecessary conversation from usec to
          FILNUM_m and FILCLKSEL_m values depending on external clock value as this configuration
          is static.
