1/*
2 * Copyright (c) 2022, Microchip Technology Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <microchip/mec172xnsz.dtsi>
10#include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
11
12/ {
13	model = "Microchip MEC172XMODULAR_ASSY6930 evaluation board";
14	compatible = "microchip,mec172xmodular_assy6930", "microchip,mec172xnsz";
15
16	chosen {
17		zephyr,sram = &sram0;
18		zephyr,flash = &flash0;
19		zephyr,console = &uart1;
20	};
21
22	aliases {
23		led1 = &led3;
24		led2 = &led2;
25		i2c0 = &i2c_smb_0;
26		i2c1 = &i2c_smb_1;
27		i2c7 = &i2c_smb_2;
28		pwm-0 = &pwm0;
29	};
30
31	leds {
32		compatible = "gpio-leds";
33		led3: led_1 {
34			/* GPIO157/LED1 on schematic,
35			 * LED3 on silkscreen.
36			 */
37			gpios = <MCHP_GPIO_DECODE_157 GPIO_ACTIVE_HIGH>;
38		};
39		led2: led_2{
40			/* GPIO153/LED2 on schematic,
41			 * LED2 on silkscreen.
42			 */
43			gpios = <MCHP_GPIO_DECODE_153 GPIO_ACTIVE_HIGH>;
44		};
45	};
46};
47
48&cpu0 {
49	clock-frequency = <96000000>;
50	status = "okay";
51};
52
53/* Initialize ECIA. Does not initialize child devices */
54&ecia {
55	status = "okay";
56};
57
58/* Enable aggregated GIRQ24 and GIRQ25 for eSPI virtual wires interrupts */
59&girq24 {
60	status = "okay";
61};
62
63&girq25 {
64	status = "okay";
65};
66
67&rtimer {
68	status = "okay";
69};
70
71&pcr {
72	status = "okay";
73};
74
75&uart1 {
76	status = "okay";
77	current-speed = <115200>;
78	pinctrl-0 = <&uart1_tx_gpio170 &uart1_rx_gpio171>;
79	pinctrl-names = "default";
80};
81
82&adc0 {
83	status = "okay";
84	pinctrl-0 = <&adc00_gpio200 &adc03_gpio203
85		     &adc04_gpio204 &adc05_gpio205>;
86	pinctrl-names = "default";
87};
88
89&espi0 {
90	status = "okay";
91	pinctrl-0 = < &espi_reset_n_gpio061 &espi_cs_n_gpio066
92		      &espi_alert_n_gpio063 &espi_clk_gpio065
93		      &espi_io0_gpio070 &espi_io1_gpio071
94		      &espi_io2_gpio072 &espi_io3_gpio073 >;
95	pinctrl-names = "default";
96};
97
98/* enable various eSPI child devices (host facing) */
99&kbc0 {
100	status = "okay";
101};
102
103&acpi_ec0 {
104	status = "okay";
105};
106
107&acpi_ec1 {
108	status = "okay";
109};
110
111&emi0 {
112	status = "okay";
113};
114
115&p80bd0 {
116	status = "okay";
117};
118
119/* I2C */
120&i2c_smb_0 {
121	status = "okay";
122	port_sel = <0>;
123
124	pinctrl-0 = < &i2c00_scl_gpio004 &i2c00_sda_gpio003 >;
125	pinctrl-names = "default";
126};
127
128&i2c00_scl_gpio004 {
129	drive-open-drain;
130	output-enable;
131	output-high;
132};
133
134&i2c00_sda_gpio003 {
135	drive-open-drain;
136	output-enable;
137	output-high;
138};
139
140&i2c_smb_1 {
141	status = "okay";
142	port_sel = <1>;
143	pinctrl-0 = <&i2c01_scl_gpio131 &i2c01_sda_gpio130>;
144	pinctrl-names = "default";
145};
146
147&i2c01_scl_gpio131 {
148	drive-open-drain;
149	output-enable;
150	output-high;
151};
152
153&i2c01_sda_gpio130 {
154	drive-open-drain;
155	output-enable;
156	output-high;
157};
158
159&i2c_smb_2 {
160	status = "okay";
161	port_sel = <7>;
162	pinctrl-0 = <&i2c07_scl_gpio013 &i2c07_sda_gpio012>;
163	pinctrl-names = "default";
164};
165
166&i2c07_scl_gpio013 {
167	drive-open-drain;
168	output-enable;
169	output-high;
170};
171
172&i2c07_sda_gpio012 {
173	drive-open-drain;
174	output-enable;
175	output-high;
176};
177
178&spi0 {
179	status = "okay";
180	compatible = "microchip,xec-qmspi-ldma";
181	clock-frequency = <4000000>;
182	lines = <4>;
183	chip-select = <0>;
184
185	pinctrl-0 = < &shd_cs0_n_gpio055
186		      &shd_clk_gpio056
187		      &shd_io0_gpio223
188		      &shd_io1_gpio224
189		      &shd_io2_gpio227
190		      &shd_io3_gpio016 >;
191	pinctrl-names = "default";
192};
193
194&kbd0 {
195	status = "okay";
196
197	pinctrl-0 = < &ksi0_gpio017 &ksi1_gpio020 &ksi2_gpio021 &ksi3_gpio026
198		      &ksi4_gpio027 &ksi5_gpio030 &ksi6_gpio031 &ksi7_gpio032
199		      &kso00_gpio040 &kso01_gpio045 &kso02_gpio046 &kso03_gpio047
200		      &kso04_gpio107 &kso05_gpio112 &kso06_gpio113 &kso07_gpio120
201		      &kso08_gpio121 &kso09_gpio122 &kso10_gpio123 &kso11_gpio124
202		      &kso12_gpio125 &kso13_gpio126 >;
203	pinctrl-1 = < &ksi0_gpio017_sleep &ksi1_gpio020_sleep &ksi2_gpio021_sleep
204		      &ksi3_gpio026_sleep &ksi4_gpio027_sleep &ksi5_gpio030_sleep
205		      &ksi6_gpio031_sleep &ksi7_gpio032_sleep &kso00_gpio040_sleep
206		      &kso01_gpio045_sleep &kso02_gpio046_sleep &kso03_gpio047_sleep
207		      &kso04_gpio107_sleep &kso05_gpio112_sleep &kso06_gpio113_sleep
208		      &kso07_gpio120_sleep &kso08_gpio121_sleep &kso09_gpio122_sleep
209		      &kso10_gpio123_sleep &kso11_gpio124_sleep &kso12_gpio125_sleep
210		      &kso13_gpio126_sleep >;
211	pinctrl-names = "default", "sleep";
212	row-size = <8>;
213	col-size = <16>;
214
215	kscan_input: kscan-input {
216		compatible = "zephyr,kscan-input";
217	};
218};
219
220&ksi0_gpio017 {
221	bias-pull-up;
222};
223
224&ksi1_gpio020 {
225	bias-pull-up;
226};
227
228&ksi2_gpio021 {
229	bias-pull-up;
230};
231
232&ksi3_gpio026 {
233	bias-pull-up;
234};
235
236&ksi4_gpio027 {
237	bias-pull-up;
238};
239
240&ksi5_gpio030 {
241	bias-pull-up;
242};
243
244&ksi6_gpio031 {
245	bias-pull-up;
246};
247
248&ksi7_gpio032 {
249	bias-pull-up;
250};
251
252&pwm0 {
253	status = "okay";
254	pinctrl-0 = <&pwm0_gpio053>;
255	pinctrl-names = "default";
256};
257
258&tach0 {
259	status = "okay";
260	pinctrl-0 = <&tach0_gpio050>;
261	pinctrl-names = "default";
262};
263
264&ps2_0 {
265	status = "okay";
266	pinctrl-0 = <&ps2_clk0a_gpio114 &ps2_dat0a_gpio115>;
267	pinctrl-names = "default";
268};
269
270&timer5 {
271	status = "okay";
272};
273