Searched +full:90 +full:mhz (Results 1 – 25 of 36) sorted by relevance
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/Zephyr-latest/dts/bindings/i3c/ |
D | nuvoton,npcx-i3c.yaml | 11 clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */ 12 core-prescaler = <3>; /* CORE_CLK runs at 30MHz */ 13 apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */ 14 apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */ 15 apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */ 16 apb4-prescaler = <3>; /* APB4_CLK runs at 30MHz */
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/Zephyr-latest/dts/bindings/clock/ |
D | espressif,esp32-rtc.yaml | 21 - 1: ESP32_RTC_FAST_CLK_SRC_RC_FAST - 8 MHz 31 - 0: ESP32_RTC_SLOW_CLK_SRC_RC_SLOW - 136 KHz (C3/S3) - 90 kHz (S2) - 150 kHz (ESP32) 33 - 2: ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256 - 17,5 MHz
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D | nuvoton,npcx-pcc.yaml | 14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */ 15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */ 16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */ 17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */ 18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */ 35 120000000, 120 MHz 36 100000000, 100 MHz 37 96000000, 96 MHz 38 90000000, 90 MHz 39 80000000, 80 MHz [all …]
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/Zephyr-latest/dts/bindings/rng/ |
D | st,stm32-rng.yaml | 22 In the provided example, MSI should be configured to provide 48Mhz clock. 29 to certify NIST SP800-90B. RNG clock source must be 48MHz.
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/Zephyr-latest/drivers/disk/ |
D | Kconfig.sdmmc | 19 default 90 66 bool "Runtime SDMMC 48MHz clock check" 70 Enable SDMMC clock 48MHz configuration runtime check.
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/Zephyr-latest/samples/drivers/clock_control_litex/ |
D | README.rst | 41 …es 2 clock outputs: ``clk0`` and ``clk1`` with default frequency set to 100MHz, 0 degrees phase of… 51 | This code will try to set on ``clk0`` frequency 50MHz, 90 degrees of phase offset and 75% duty cy… 61 .phase = 90 122 [00:00:00.550,000] <inf> CLK_CTRL_LITEX: CLKOUT0: set phase: 90 deg 127 CLKOUT0: get_status: rate:15000000 phase:90 duty:25
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nxp,imx8m-pinctrl.yaml | 91 100 85_OHM — 85 Ohm @3.3V, 80 Ohm @2.5V, 75 Ohm @1.8V, 90 Ohm @1.2V 105 00 SLOW — Slow Frequency Slew Rate (50Mhz) 106 01 MEDIUM — Medium Frequency Slew Rate (100Mhz) 107 10 FAST — Fast Frequency Slew Rate (150Mhz) 108 11 MAX — Max Frequency Slew Rate (200Mhz)
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/Zephyr-latest/dts/arm/nuvoton/npcx/ |
D | npcx7.dtsi | 122 clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */ 123 core-prescaler = <6>; /* CORE_CLK runs at 15MHz */ 124 apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */ 125 apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */ 126 apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */
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D | npcx9.dtsi | 153 clock-frequency = <DT_FREQ_M(90)>; /* OFMCLK runs at 90MHz */ 154 core-prescaler = <6>; /* CORE_CLK runs at 15MHz */ 155 apb1-prescaler = <6>; /* APB1_CLK runs at 15MHz */ 156 apb2-prescaler = <6>; /* APB2_CLK runs at 15MHz */ 157 apb3-prescaler = <6>; /* APB3_CLK runs at 15MHz */ 158 apb4-prescaler = <6>; /* APB4_CLK runs at 15MHz */
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/Zephyr-latest/boards/st/nucleo_u083rc/doc/ |
D | index.rst | 36 They operate at a frequency of up to 56 MHz. 50 - 52 µA/MHz Run mode 57 - 32-bit Arm |reg| Cortex |reg|-M0+ CPU, frequency up to 56 MHz 65 - 1.13 DMIPS/MHz (Drystone 2.1) 66 - 134 CoreMark |reg| (2.4 CoreMark/MHz at 56 MHz) 82 - 4 to 48 MHz crystal oscillator 84 - Internal 16 MHz factory-trimmed RC (±1%) 86 - Internal multispeed 100 kHz to 48 MHz oscillator, 88 - Internal 48 MHz with clock recovery 99 - True random number generation, candidate for NIST SP 800-90B certification [all …]
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/Zephyr-latest/boards/nuvoton/npcx7m6fb_evb/doc/ |
D | index.rst | 55 The NPCX7M6FB MCU is configured to use the 90Mhz internal oscillator with the 56 on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
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/Zephyr-latest/boards/st/stm32h7s78_dk/doc/ |
D | index.rst | 48 They operate at a frequency of up to 500 MHz. 53 - 1284 DMPIS/MHz (Dhrystone 2.1) 69 - True random number generator, NIST SP800-90B compliant 72 - True Random Number Generator (RNG) NIST SP800-90B compliant 76 - 24 MHz crystal oscillator (HSE) 78 - Internal 64 MHz (HSI) trimmable by software 80 - Internal 4 MHz oscillator (CSI), trimmable by software 81 - Internal 48 MHz (HSI48) with recovery system 224 500MHz, driven by 24MHz external oscillator (HSE).
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/Zephyr-latest/boards/st/nucleo_u031r8/doc/ |
D | index.rst | 36 They operate at a frequency of up to 56 MHz. 50 - 52 µA/MHz Run mode 55 - 32-bit Arm |reg| Cortex |reg|-M0+ CPU, frequency up to 56 MHz 63 - 1.13 DMIPS/MHz (Drystone 2.1) 64 - 134 CoreMark |reg| (2.4 CoreMark/MHz at 56 MHz) 80 - 4 to 48 MHz crystal oscillator 82 - Internal 16 MHz factory-trimmed RC (±1%) 84 - Internal multispeed 100 kHz to 48 MHz oscillator, 95 - True random number generation, candidate for NIST SP 800-90B certification 182 48MHz, driven by 4MHz medium speed internal oscillator.
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/Zephyr-latest/boards/st/stm32u083c_dk/doc/ |
D | index.rst | 43 They operate at a frequency of up to 56 MHz. 57 - 52 µA/MHz Run mode (LDO mode) 62 - 32-bit Arm |reg| Cortex |reg|-M0+ CPU, frequency up to 56 MHz 70 - 1.13 DMIPS/MHz (Drystone 2.1) 71 - 134 CoreMark |reg| (2.4 CoreMark/MHz at 56 MHz) 87 - 4 to 48 MHz crystal oscillator 89 - Internal 16 MHz factory-trimmed RC (±1%) 91 - Internal multispeed 100 kHz to 48 MHz oscillator, 93 - Internal 48 MHz with clock recovery 104 - True random number generation, candidate for NIST SP 800-90B certification [all …]
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/Zephyr-latest/boards/st/sensortile_box_pro/doc/ |
D | index.rst | 42 They operate at a frequency of up to 160 MHz. 44 - Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode) 48 - 1.5 DMPIS/MHz (Drystone 2.1) 49 - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ) 64 - True Random Number Generator NIST SP800-90B compliant 71 - 4 to 50 MHz crystal oscillator 73 - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) 75 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by 78 - Internal 48 MHz with clock recovery 99 external memories: up to 160 MHz, MPU, 240 DMIPS and DSP [all …]
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/Zephyr-latest/boards/st/stm32h573i_dk/doc/ |
D | index.rst | 50 They operate at a frequency of up to 250 MHz. 55 - 375 DMPIS/MHz (Dhrystone 2.1) 71 - True random number generator, NIST SP800-90B compliant 74 - True Random Number Generator (RNG) NIST SP800-90B compliant 78 - 25 MHz crystal oscillator (HSE) 80 - Internal 64 MHz (HSI) trimmable by software 82 - Internal 4 MHz oscillator (CSI), trimmable by software 83 - Internal 48 MHz (HSI48) with recovery system 230 240MHz, driven by 25MHz external oscillator (HSE).
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/Zephyr-latest/boards/st/nucleo_wl55jc/doc/ |
D | nucleo_wl55jc.rst | 12 (Arm® Cortex®-M4/M0+ at 48 MHz) in UFBGA73 package featuring: 15 - RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa®, 22 - 32 MHz HSE on-board oscillator 55 - Frequency range: 150 MHz to 960 MHz 62 ETSI EN 300 220, EN 300 113, EN 301 166, FCC CFR 47 Part 15, 24, 90, 101 72 execution from Flash memory, frequency up to 48 MHz, MPU 74 - 1.25 DMIPS/MHz (Dhrystone 2.1) 78 - Frequency up to 48 MHz, MPU 79 - 0.95 DMIPS/MHz (Dhrystone 2.1) 106 - 32 MHz crystal oscillator [all …]
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/Zephyr-latest/boards/st/nucleo_wba52cg/doc/ |
D | nucleo_wba52cg.rst | 45 core. They operate at a frequency of up to 100 MHz. 69 - 45 µA/MHz Run mode at 3.3 V 74 from flash memory (frequency up to 100 MHz, 150 DMIPS) 79 - 1.5 DMIPS/MHz (Drystone 2.1) 80 - 407 CoreMark® (4.07 CoreMark/MHz) 84 - 32 MHz crystal oscillator 87 - Internal 16 MHz factory trimmed RC (±1%) 129 - True random number generator, NIST SP800-90B compliant 206 as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
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/Zephyr-latest/boards/st/nucleo_u5a5zj_q/doc/ |
D | index.rst | 35 They operate at a frequency of up to 160 MHz. 52 - 18.5 µA/MHz Run mode at 3.3 V 59 memories: frequency up to 160 MHz, 240 DMIPS 69 - 1.5 DMIPS/MHz (Drystone 2.1) 70 - 655 CoreMark® (4.09 CoreMark®/MHz) 84 - 16-bit HSPI memory interface up to 160 MHz 104 - 4 to 50 MHz crystal oscillator 106 - Internal 16 MHz factory-trimmed RC (± 1 %) 108 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one 110 - Internal 48 MHz [all …]
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/Zephyr-latest/boards/st/steval_stwinbx1/doc/ |
D | index.rst | 39 They operate at a frequency of up to 160 MHz. 41 - Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode) 45 - 1.5 DMPIS/MHz (Drystone 2.1) 46 - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ) 61 - True Random Number Generator NIST SP800-90B compliant 68 - 4 to 50 MHz crystal oscillator 70 - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) 72 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by 75 - Internal 48 MHz with clock recovery 96 external memories: up to 160 MHz, MPU, 240 DMIPS and DSP [all …]
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/Zephyr-latest/boards/st/nucleo_u575zi_q/doc/ |
D | index.rst | 35 They operate at a frequency of up to 160 MHz. 37 - Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode) 41 - 1.5 DMPIS/MHz (Drystone 2.1) 42 - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ) 53 - True Random Number Generator NIST SP800-90B compliant 59 - 4 to 50 MHz crystal oscillator 61 - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) 63 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by 66 - Internal 48 MHz with clock recovery 87 external memories: up to 160 MHz, MPU, 240 DMIPS and DSP [all …]
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/Zephyr-latest/boards/atmel/sam/sam4l_ek/doc/ |
D | index.rst | 8 down to 90μA/MHz. The device allows a wide range of configurations giving the 26 - 12 MHz crystal oscillator 94 The SAM4L MCU is configured to use the 12 MHz internal oscillator on the board 95 with the on-chip PLL to generate an 48 MHz system clock.
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/Zephyr-latest/dts/arm/atmel/ |
D | samd5x.dtsi | 321 * 16 MHz max, source clock must not exceed 100 MHz. 324 * -> 48 MHz GCLK(2) / 4 = 12 MHz 343 * 16 MHz max, source clock must not exceed 100 MHz. 346 * -> 48 MHz GCLK(2) / 4 = 12 MHz 393 <90 0>, <91 0>;
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/Zephyr-latest/boards/st/nucleo_wba55cg/doc/ |
D | nucleo_wba55cg.rst | 43 core. They operate at a frequency of up to 100 MHz. 67 - 45 µA/MHz Run mode at 3.3 V 72 from flash memory (frequency up to 100 MHz, 150 DMIPS) 77 - 1.5 DMIPS/MHz (Drystone 2.1) 78 - 407 CoreMark® (4.07 CoreMark/MHz) 82 - 32 MHz crystal oscillator 85 - Internal 16 MHz factory trimmed RC (±1%) 127 - True random number generator, NIST SP800-90B compliant 219 as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
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/Zephyr-latest/boards/nuvoton/npcx9m6f_evb/doc/ |
D | index.rst | 69 The NPCX9M6F MCU is configured to use the 90Mhz internal oscillator with the 70 on-chip PLL to generate a resulting EC clock rate of 15 MHz. See Processor clock
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