1.. zephyr:board:: nucleo_u575zi_q 2 3Overview 4******** 5 6The Nucleo U575ZI Q board, featuring an ARM Cortex-M33 based STM32U575ZI MCU, 7provides an affordable and flexible way for users to try out new concepts and 8build prototypes by choosing from the various combinations of performance and 9power consumption features. Here are some highlights of the Nucleo U575ZI Q 10board: 11 12 13- STM32U575ZI microcontroller in LQFP144 package 14- Internal SMPS to generate V core logic supply 15- Two types of extension resources: 16 17 - Arduino Uno V3 connectivity 18 - ST morpho extension pin headers for full access to all STM32 I/Os 19 20- On-board ST-LINK/V3E debugger/programmer 21- Flexible board power supply: 22 23 - USB VBUS or external source(3.3V, 5V, 7 - 12V) 24 - ST-Link V3E 25 26- Three users LEDs 27- Two push-buttons: USER and RESET 28- USB Type-C |trade| Sink device FS 29 30Hardware 31******** 32 33The STM32U575xx devices are an ultra-low-power microcontrollers family (STM32U5 34Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core. 35They operate at a frequency of up to 160 MHz. 36 37- Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode) 38- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. 39- Performance benchmark: 40 41 - 1.5 DMPIS/MHz (Drystone 2.1) 42 - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ) 43 44- Security 45 46 - Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals 47 - Flexible life cycle scheme with RDP (readout protection) and password protected debug 48 - Root of trust thanks to unique boot entry and secure hide protection area (HDP) 49 - Secure Firmware Installation thanks to embedded Root Secure Services 50 - Secure Firmware Update support with TF-M 51 - HASH hardware accelerator 52 - Active tampers 53 - True Random Number Generator NIST SP800-90B compliant 54 - 96-bit unique ID 55 - 512-byte One-Time Programmable for user data 56 57- Clock management: 58 59 - 4 to 50 MHz crystal oscillator 60 - 32 kHz crystal oscillator for RTC (LSE) 61 - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) 62 - Internal low-power 32 kHz RC ( |plusminus| 5%) 63 - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by 64 LSE (better than |plusminus| 0.25 % accuracy) 65 - 3 PLLs for system clock, USB, audio, ADC 66 - Internal 48 MHz with clock recovery 67 68- Power management 69 70 - Embedded regulator (LDO) 71 - Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling 72 73- RTC with HW calendar and calibration 74- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V 75- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors 76- Up to 17 timers and 2 watchdogs 77 78 - 2x 16-bit advanced motor-control 79 - 2x 32-bit and 5 x 16-bit general purpose 80 - 4x low-power 16-bit timers (available in Stop mode) 81 - 2x watchdogs 82 - 2x SysTick timer 83 84- ART accelerator 85 86 - 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and 87 external memories: up to 160 MHz, MPU, 240 DMIPS and DSP 88 - 4-Kbyte data cache for external memories 89 90- Memories 91 92 - 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles 93 - 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON 94 - External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories 95 - 2 Octo-SPI memory interfaces 96 97- Rich analog peripherals (independent supply) 98 99 - 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling 100 - 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode 101 - 2 12-bit DAC, low-power sample and hold 102 - 2 operational amplifiers with built-in PGA 103 - 2 ultra-low-power comparators 104 105- Up to 22 communication interfaces 106 107 - USB Type-C / USB power delivery controller 108 - USB OTG 2.0 full-speed controller 109 - 2x SAIs (serial audio interface) 110 - 4x I2C FM+(1 Mbit/s), SMBus/PMBus 111 - 6x USARTs (ISO 7816, LIN, IrDA, modem) 112 - 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode) 113 - 1x FDCAN 114 - 2x SDMMC interface 115 - 16- and 4-channel DMA controllers, functional in Stop mode 116 - 1 multi-function digital filter (6 filters)+ 1 audio digital filter with 117 sound-activity detection 118 119- CRC calculation unit 120- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| 121- True Random Number Generator (RNG) 122 123- Graphic features 124 125 - Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation 126 - 1 digital camera interface 127 128- Mathematical co-processor 129 130 - CORDIC for trigonometric functions acceleration 131 - FMAC (filter mathematical accelerator) 132 133More information about STM32U575ZI can be found here: 134 135- `STM32U575ZI on www.st.com`_ 136- `STM32U575 reference manual`_ 137 138Supported Features 139================== 140 141The Zephyr nucleo_u575zi_q board configuration supports the following hardware features: 142 143+-----------+------------+-------------------------------------+ 144| Interface | Controller | Driver/Component | 145+===========+============+=====================================+ 146| CAN/CANFD | on-chip | canbus | 147+-----------+------------+-------------------------------------+ 148| CLOCK | on-chip | reset and clock control | 149+-----------+------------+-------------------------------------+ 150| DAC | on-chip | DAC Controller | 151+-----------+------------+-------------------------------------+ 152| GPIO | on-chip | gpio | 153+-----------+------------+-------------------------------------+ 154| I2C | on-chip | i2c | 155+-----------+------------+-------------------------------------+ 156| NVIC | on-chip | nested vector interrupt controller | 157+-----------+------------+-------------------------------------+ 158| PINMUX | on-chip | pinmux | 159+-----------+------------+-------------------------------------+ 160| SPI | on-chip | spi | 161+-----------+------------+-------------------------------------+ 162| UART | on-chip | serial port-polling; | 163| | | serial port-interrupt | 164+-----------+------------+-------------------------------------+ 165| WATCHDOG | on-chip | independent watchdog | 166+-----------+------------+-------------------------------------+ 167| USB FS | on-chip | USB Full Speed device | 168+-----------+------------+-------------------------------------+ 169| BKP SRAM | on-chip | Backup SRAM | 170+-----------+------------+-------------------------------------+ 171| RNG | on-chip | True Random number generator | 172+-----------+------------+-------------------------------------+ 173| RTC | on-chip | rtc | 174+-----------+------------+-------------------------------------+ 175 176 177Other hardware features are not yet supported on this Zephyr port. 178 179The default configuration can be found in the defconfig file: 180:zephyr_file:`boards/st/nucleo_u575zi_q/nucleo_u575zi_q_defconfig` 181 182 183Connections and IOs 184=================== 185 186Nucleo U575ZI Q Board has 9 GPIO controllers. These controllers are responsible for pin muxing, 187input/output, pull-up, etc. 188 189For more details please refer to `STM32 Nucleo-144 board User Manual`_. 190 191Default Zephyr Peripheral Mapping: 192---------------------------------- 193 194 195- CAN/CANFD_TX: PD1 196- CAN/CANFD_RX: PD0 197- DAC1_OUT1 : PA4 198- I2C_1_SCL : PB8 199- I2C_1_SDA : PB9 200- I2C_2_SCL : PF1 201- I2C_2_SDA : PF0 202- LD1 : PC7 203- LD2 : PB7 204- LD3 : PG2 205- LPUART_1_TX : PG7 206- LPUART_1_RX : PG8 207- SPI_1_NSS : PA4 208- SPI_1_SCK : PA5 209- SPI_1_MISO : PA6 210- SPI_1_MOSI : PA7 211- UART_1_TX : PA9 212- UART_1_RX : PA10 213- UART_2_TX : PD5 214- UART_2_RX : PD6 215- USER_PB : PC13 216 217System Clock 218------------ 219 220Nucleo U575ZI Q System Clock could be driven by internal or external oscillator, 221as well as main PLL clock. By default System clock is driven by PLL clock at 222160MHz, driven by 4MHz medium speed internal oscillator. 223 224Serial Port 225----------- 226 227Nucleo U575ZI Q board has 6 U(S)ARTs. The Zephyr console output is assigned to 228USART1. Default settings are 115200 8N1. 229 230 231Backup SRAM 232----------- 233 234In order to test backup SRAM you may want to disconnect VBAT from VDD. You can 235do it by removing ``SB50`` jumper on the back side of the board. 236 237 238Programming and Debugging 239************************* 240 241Nucleo U575ZI-Q board includes an ST-LINK/V3 embedded debug tool interface. 242This probe allows to flash the board using various tools. 243 244Flashing 245======== 246 247The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, 248so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required. 249 250Alternatively, OpenOCD, JLink, or pyOCD can also be used to flash the board using 251the ``--runner`` (or ``-r``) option: 252 253.. code-block:: console 254 255 $ west flash --runner openocd 256 $ west flash --runner jlink 257 $ west flash --runner pyocd 258 259For pyOCD, additional target information needs to be installed. 260This can be done by executing the following commands. 261 262.. code-block:: console 263 264 $ pyocd pack --update 265 $ pyocd pack --install stm32u5 266 267 268Flashing an application to Nucleo U575ZI Q 269------------------------------------------ 270 271Connect the Nucleo U575ZI Q to your host computer using the USB port. 272Then build and flash an application. Here is an example for the 273:zephyr:code-sample:`hello_world` application. 274 275Run a serial host program to connect with your Nucleo board: 276 277.. code-block:: console 278 279 $ minicom -D /dev/ttyACM0 280 281Then build and flash the application. 282 283.. zephyr-app-commands:: 284 :zephyr-app: samples/hello_world 285 :board: nucleo_u575zi_q 286 :goals: build flash 287 288You should see the following message on the console: 289 290.. code-block:: console 291 292 Hello World! arm 293 294Debugging 295========= 296 297Default flasher for this board is openocd. It could be used in the usual way. 298Here is an example for the :zephyr:code-sample:`blinky` application. 299 300.. zephyr-app-commands:: 301 :zephyr-app: samples/basic/blinky 302 :board: nucleo_u575zi_q 303 :goals: debug 304 305.. _STM32 Nucleo-144 board User Manual: 306 https://www.st.com/resource/en/user_manual/dm00615305.pdf 307 308.. _STM32U575ZI on www.st.com: 309 https://www.st.com/en/microcontrollers/stm32u575zi.html 310 311.. _STM32U575 reference manual: 312 https://www.st.com/resource/en/reference_manual/rm0456-stm32u575585-armbased-32bit-mcus-stmicroelectronics.pdf 313 314.. _STM32CubeProgrammer: 315 https://www.st.com/en/development-tools/stm32cubeprog.html 316 317.. _STMicroelectronics customized version of OpenOCD: 318 https://github.com/STMicroelectronics/OpenOCD 319
