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Searched refs:pinmux (Results 251 – 275 of 983) sorted by relevance

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/Zephyr-latest/boards/nxp/frdm_kl25z/
Dfrdm_kl25z-pinctrl.dtsi15 pinmux = <ADC0_SE12_PTB2>;
23 pinmux = <I2C0_SCL_PTE24>,
32 pinmux = <UART0_RX_PTA1>,
/Zephyr-latest/samples/drivers/memc/boards/
Dapollo3p_evb.overlay63 pinmux = <GPIO_P51>,
81 pinmux = <MSPI1_0_P51>,
95 pinmux = <MSPI1_8_P59>;
102 pinmux = <NCE69_P69>;
109 pinmux = <GPIO_P50>;
Dfrdm_rw612.overlay26 pinmux_flexspi_safe: pinmux-flexspi-safe {
28 pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
38 pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
/Zephyr-latest/samples/drivers/mspi/mspi_async/boards/
Dapollo3p_evb.overlay63 pinmux = <GPIO_P51>,
81 pinmux = <MSPI1_0_P51>,
95 pinmux = <MSPI1_8_P59>;
102 pinmux = <NCE69_P69>;
109 pinmux = <GPIO_P50>;
/Zephyr-latest/tests/drivers/mspi/flash/boards/
Dapollo3p_evb.overlay57 pinmux = <GPIO_P51>,
74 pinmux = <MSPI1_0_P51>,
88 pinmux = <MSPI1_8_P59>;
95 pinmux = <NCE50_P50>;
102 pinmux = <GPIO_P69>;
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dpinctrl_soc.h109 struct pinctrl_soc_pinmux pinmux; member
118 .mux_register = DT_PROP_BY_IDX(node_id, pinmux, 0), \
119 .config_register = DT_PROP_BY_IDX(node_id, pinmux, 4), \
120 .input_register = DT_PROP_BY_IDX(node_id, pinmux, 2), \
121 .mux_mode = DT_PROP_BY_IDX(node_id, pinmux, 1), \
122 .input_daisy = DT_PROP_BY_IDX(node_id, pinmux, 3), \
140 .pinmux = Z_PINCTRL_PINMUX(group_id, pin_prop, idx), \
154 DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)}; \
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt118x_cm33.dtsi56 * GPIO pinmux options. These options define the pinmux settings
62 pinmux = <&iomuxc_aon_gpio_aon_00_gpio1_io00>,
93 pinmux = <&iomuxc_gpio_emc_b1_00_gpio2_io00>,
128 pinmux = <&iomuxc_gpio_emc_b1_32_gpio3_io00>,
162 pinmux = <&iomuxc_gpio_ad_00_gpio4_io00>,
197 pinmux = <&iomuxc_gpio_ad_32_gpio5_io00>,
222 pinmux = <&iomuxc_gpio_b1_00_gpio6_io00>,
Dnxp_rt118x_cm33_ns.dtsi56 * GPIO pinmux options. These options define the pinmux settings
62 pinmux = <&iomuxc_aon_gpio_aon_00_gpio1_io00>,
93 pinmux = <&iomuxc_gpio_emc_b1_00_gpio2_io00>,
128 pinmux = <&iomuxc_gpio_emc_b1_32_gpio3_io00>,
162 pinmux = <&iomuxc_gpio_ad_00_gpio4_io00>,
197 pinmux = <&iomuxc_gpio_ad_32_gpio5_io00>,
222 pinmux = <&iomuxc_gpio_b1_00_gpio6_io00>,
Dnxp_rt1020.dtsi63 * GPIO pinmux options. These options define the pinmux settings
69 pinmux = <&iomuxc_gpio_ad_b0_00_gpio1_io00>,
104 pinmux = <&iomuxc_gpio_emc_00_gpio2_io00>,
139 pinmux = <&iomuxc_gpio_emc_32_gpio3_io00>,
172 pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>,
Dnxp_rt1060.dtsi104 * GPIO pinmux options. These options define the pinmux settings
110 pinmux = <&iomuxc_gpio_ad_b0_00_gpio1_io00>,
145 pinmux = <&iomuxc_gpio_b0_00_gpio2_io00>,
180 pinmux = <&iomuxc_gpio_sd_b1_00_gpio3_io00>,
211 pinmux = <&iomuxc_gpio_emc_00_gpio4_io00>,
246 pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>,
252 pinmux = <&iomuxc_gpio_ad_b0_00_gpio6_io00>,
287 pinmux = <&iomuxc_gpio_b0_00_gpio7_io00>,
322 pinmux = <&iomuxc_gpio_sd_b1_00_gpio8_io00>,
353 pinmux = <&iomuxc_gpio_emc_00_gpio9_io00>,
Dnxp_kl25z.dtsi121 porta: pinmux@40049000 {
122 compatible = "nxp,port-pinmux";
127 portb: pinmux@4004a000 {
128 compatible = "nxp,port-pinmux";
133 portc: pinmux@4004b000 {
134 compatible = "nxp,port-pinmux";
139 portd: pinmux@4004c000 {
140 compatible = "nxp,port-pinmux";
145 porte: pinmux@4004d000 {
146 compatible = "nxp,port-pinmux";
Dnxp_rt11xx_cm4.dtsi186 * GPIO pinmux options. These options define the pinmux settings
192 pinmux = <&iomuxc_gpio_emc_b1_00_gpio_mux1_io00>,
227 pinmux = <&iomuxc_gpio_ad_33_gpio10_io00>,
262 pinmux = <&iomuxc_gpio_disp_b1_11_gpio11_io00>,
282 pinmux = <&iomuxc_lpsr_gpio_lpsr_00_gpio12_io00>,
301 pinmux = <&iomuxc_snvs_wakeup_dig_gpio13_io00>,
317 pinmux = <&iomuxc_gpio_emc_b1_32_gpio_mux2_io00>,
352 pinmux = <&iomuxc_gpio_ad_01_gpio_mux3_io00>,
387 pinmux = <&iomuxc_gpio_ad_33_gpio_mux4_io00>,
422 pinmux = <&iomuxc_gpio_disp_b1_11_gpio_mux5_io00>,
[all …]
/Zephyr-latest/samples/drivers/i2s/echo/boards/
Desp32s3_devkitc_procpu.overlay10 pinmux = <I2S0_MCLK_GPIO42>,
20 pinmux = <I2S1_MCLK_GPIO35>,
26 pinmux = <I2S1_I_SD_GPIO38>;
/Zephyr-latest/boards/nuvoton/numaker_m2l31ki/
Dnumaker_m2l31ki-pinctrl.dtsi12 pinmux = <PB12MFP_UART0_RXD>,
20 pinmux = <PB9MFP_UART1_nCTS>,
31 pinmux = <PA12MFP_USB_VBUS>,
/Zephyr-latest/soc/adi/max32/common/
Dpinctrl_soc.h20 uint32_t pinmux; member
24 #define Z_PINCTRL_MAX32_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux)
36 {.pinmux = Z_PINCTRL_MAX32_PINMUX_INIT(DT_PROP_BY_IDX(node_id, state_prop, idx)), \
/Zephyr-latest/soc/nuvoton/numicro/common/
Dpinctrl_soc.h19 uint32_t pinmux : 12; member
33 .pinmux = DT_PROP_BY_IDX(node_id, prop, idx), \
45 DT_FOREACH_PROP_ELEM, pinmux, \
/Zephyr-latest/tests/drivers/spi/spi_loopback/socs/
Desp32_procpu.overlay10 pinmux = <SPIM3_MISO_GPIO19>;
14 pinmux = <SPIM3_MOSI_GPIO19>;
18 pinmux = <SPIM3_SCLK_GPIO18>,
Desp32s3_procpu.overlay10 pinmux = <SPIM3_MISO_GPIO37>;
14 pinmux = <SPIM3_MOSI_GPIO37>;
18 pinmux = <SPIM3_SCLK_GPIO36>,
Desp32c2.overlay10 pinmux = <SPIM2_MISO_GPIO2>;
14 pinmux = <SPIM2_MOSI_GPIO2>;
18 pinmux = <SPIM2_SCLK_GPIO6>,
Desp32c3.overlay10 pinmux = <SPIM2_MISO_GPIO2>;
14 pinmux = <SPIM2_MOSI_GPIO2>;
18 pinmux = <SPIM2_SCLK_GPIO6>,
Desp32c6.overlay10 pinmux = <SPIM2_MISO_GPIO2>;
14 pinmux = <SPIM2_MOSI_GPIO2>;
18 pinmux = <SPIM2_SCLK_GPIO6>,
Desp32s2.overlay10 pinmux = <SPIM3_MISO_GPIO37>;
14 pinmux = <SPIM3_MOSI_GPIO37>;
18 pinmux = <SPIM3_SCLK_GPIO36>,
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dcy8cproto_062_4343w.overlay28 pinmux = <DT_CAT1_PINMUX(6, 0, HSIOM_SEL_ACT_8)>;
33 pinmux = <DT_CAT1_PINMUX(6, 1, HSIOM_SEL_ACT_8)>;
38 pinmux = <DT_CAT1_PINMUX(6, 2, HSIOM_SEL_ACT_8)>;
Dcy8cproto_063_ble.overlay4 pinmux = <DT_CAT1_PINMUX(10, 0, HSIOM_SEL_ACT_8)>;
9 pinmux = <DT_CAT1_PINMUX(10, 1, HSIOM_SEL_ACT_8)>;
14 pinmux = <DT_CAT1_PINMUX(10, 2, HSIOM_SEL_ACT_8)>;
/Zephyr-latest/boards/quicklogic/qomu/
Dqomu.dts64 pinmux = <UART_RX_PAD45>;
68 pinmux = <UART_TX_PAD44>;
72 pinmux = <USB_PU_CTRL_PAD23>;
78 pinmux = <USB_DN_PAD28>;
84 pinmux = <USB_DP_PAD31>;

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