Home
last modified time | relevance | path

Searched +full:phys +full:- +full:clock (Results 1 – 25 of 79) sorted by relevance

1234

/Zephyr-latest/dts/bindings/usb/renesas/
Drenesas,ra-usbhs.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Renesas RA USB high-speed controller
6 compatible: "renesas,ra-usbhs"
8 include: [pinctrl-device.yaml, usb-ep.yaml]
11 phys-clock:
14 USBHS physical clocks. Should be provided in case internal clock source is set in phys node.
21 interrupt-names:
24 - "usbhs-ir"
31 phys:
Drenesas,ra-usbfs.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Renesas RA USB full-speed controller
6 compatible: "renesas,ra-usbfs"
8 include: [pinctrl-device.yaml, usb-ep.yaml]
11 phys-clock:
14 description: USBFS physical clock.
21 interrupt-names:
24 - "usbfs-i"
25 - "usbfs-r"
32 phys:
/Zephyr-latest/dts/bindings/phy/
Drenesas,ra-usbphyc.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra-usbphyc"
8 include: phy-controller.yaml
11 clock:
14 Clock source for PHY clock in case internal clock is using
16 phys-clock-src:
19 - "internal"
20 - "xtal"
22 Select clock source for PHY clock as XTAL or use internal clock
24 "#phy-cells":
/Zephyr-latest/dts/bindings/mdio/
Dmdio-controller.yaml1 # Copyright (c) 2021 IP-Logix Inc.
2 # SPDX-License-Identifier: Apache-2.0
11 "#address-cells":
15 "#size-cells":
19 suppress-preamble:
22 When present, the SMA suppresses the 32-bit preamble and transmits
26 clock-frequency:
32 on what the PHYs connected to the mdio bus can support. Default of 2.5MHz
33 is the standard and should supported by all PHYs.
/Zephyr-latest/dts/arm/st/l0/
Dstm32l053.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32l053", "st,stm32l0", "simple-bus";
24 compatible = "st,stm32-usb";
27 interrupt-names = "usb";
28 num-bidir-endpoints = <8>;
29 ram-size = <1024>;
[all …]
Dstm32l072.dtsi4 * SPDX-License-Identifier: Apache-2.0
15 clk_hsi48: clk-hsi48 {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
18 clock-frequency = <DT_FREQ_M(48)>;
24 compatible = "st,stm32l072", "st,stm32l0", "simple-bus";
27 compatible = "st,stm32-usb";
30 interrupt-names = "usb";
31 num-bidir-endpoints = <8>;
32 ram-size = <1024>;
[all …]
/Zephyr-latest/boards/ene/kb1200_evb/support/
Dopenocd.cfg1 # SPDX-License-Identifier: GPL-2.0-or-later
7 source [find target/swj-dp.tcl]
17 # SWD DAP ID of ENE KB1200 Cortex-M4.
24 # Work-area is a space in RAM used for flash programming
33 swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
34 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
36 target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
38 $_TARGETNAME configure -work-area-phys 0x200c0000 -work-area-size $_WORKAREASIZE -work-area-backup 0
41 # For safety purposes, set for the lowest cpu clock configuration
45 # For safety purposes, set for the lowest cpu clock configuration
[all …]
/Zephyr-latest/dts/bindings/mipi-dsi/
Drenesas,ra-mipi-dsi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,ra-mipi-dsi"
8 include: [mipi-dsi-host.yaml]
17 interrupt-names:
18 type: string-array
22 pll-div:
28 pll-mul-int:
33 pll-mul-frac:
39 lp-divisor:
44 ulps-wakeup-period:
[all …]
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>
17 model = "NXP MR-CANHUBK3";
25 zephyr,code-partition = &code_partition;
[all …]
/Zephyr-latest/boards/nxp/ucans32k1sic/
Ducans32k1sic.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include "ucans32k1sic-pinctrl.dtsi"
22 zephyr,shell-uart = &lpuart1;
23 zephyr,uart-pipe = &lpuart1;
31 pwm-led0 = &led1_red_pwm;
32 pwm-led1 = &led1_green_pwm;
[all …]
/Zephyr-latest/boards/shields/rtkmipilcdb00000be/boards/
Dek_ra8d1.overlay4 * SPDX-License-Identifier: Apache-2.0
13 drive-strength = "medium";
20 #address-cells = <1>;
21 #size-cells = <0>;
22 clock-frequency = <DT_FREQ_K(100)>;
23 pinctrl-0 = <&iic1_default>;
24 pinctrl-names = "default";
28 input-pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
33 pll-div = <1>;
34 pll-mul-int = <50>;
[all …]
/Zephyr-latest/dts/arm/st/l4/
Dstm32l412.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32l412", "st,stm32l4", "simple-bus";
30 compatible = "st,stm32-usb";
33 interrupt-names = "usb";
34 num-bidir-endpoints = <8>;
35 ram-size = <1024>;
[all …]
Dstm32l432.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32l432", "st,stm32l4", "simple-bus";
29 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
30 #address-cells = <1>;
31 #size-cells = <0>;
39 compatible = "st,stm32-timers";
[all …]
/Zephyr-latest/dts/arm/st/f0/
Dstm32f042.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 clk_hsi48: clk-hsi48 {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <DT_FREQ_M(48)>;
21 compatible = "st,stm32f042", "st,stm32f0", "simple-bus";
25 compatible = "st,stm32-usart", "st,stm32-uart";
34 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
35 #address-cells = <1>;
36 #size-cells = <0>;
[all …]
/Zephyr-latest/boards/fysetc/ucan/
Ducan.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f0/stm32f072c(8-b)tx-pinctrl.dtsi>
19 zephyr,code-partition = &slot0_partition;
29 compatible = "gpio-leds";
40 transceiver0: can-phy0 {
41 compatible = "can-transceiver-gpio";
42 enable-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
43 max-bitrate = <1000000>;
44 #phy-cells = <0>;
[all …]
/Zephyr-latest/boards/others/candlelight/
Dcandlelight.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f0/stm32f072c(8-b)tx-pinctrl.dtsi>
19 zephyr,code-partition = &slot0_partition;
29 compatible = "gpio-leds";
40 transceiver0: can-phy0 {
41 compatible = "nxp,tja1051", "can-transceiver-gpio";
42 enable-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
43 max-bitrate = <1000000>;
44 #phy-cells = <0>;
[all …]
/Zephyr-latest/boards/others/candlelightfd/
Dcandlelightfd.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>
14 zephyr,code-partition = &slot0_partition;
24 compatible = "gpio-leds";
35 transceiver0: can-phy0 {
36 compatible = "nxp,tja1051", "can-transceiver-gpio";
37 enable-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
38 max-bitrate = <5000000>;
39 #phy-cells = <0>;
45 clock-frequency = <DT_FREQ_M(8)>;
[all …]
/Zephyr-latest/boards/adi/sdp_k1/
Dadi_sdp_k1.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f4/stm32f469nihx-pinctrl.dtsi>
14 model = "Analog Devices Inc. SDP-K1 board";
15 compatible = "adi,sdp-k1";
19 zephyr,shell-uart = &uart5;
26 compatible = "gpio-leds";
46 compatible = "usb-ulpi-phy";
47 reset-gpios = <&gpiod 7 (GPIO_ACTIVE_LOW)>;
48 #phy-cells = <0>;
[all …]
/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dr7fa6m3ax.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/renesas/ra/ra6/ra6-cm4-common.dtsi>
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
9 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
14 compatible = "mmio-sram";
19 compatible = "renesas,ra-gpio-ioport";
22 gpio-controller;
23 #gpio-cells = <2>;
29 compatible = "renesas,ra-gpio-ioport";
32 gpio-controller;
[all …]
/Zephyr-latest/boards/others/canbardo/
Dcanbardo.dts2 * Copyright (c) 2024-2025 Henrik Brix Andersen <henrik@brixandersen.dk>
3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 #include "canbardo-pinctrl.dtsi"
22 zephyr,shell-uart = &uart1;
25 zephyr,code-partition = &slot0_partition;
32 mcuboot-led0 = &dfu_led;
33 mcuboot-button0 = &sw;
[all …]
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dr7fa8m1xh.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 xtal: clock-main-osc {
16 compatible = "renesas,ra-cgc-external-clock";
17 clock-frequency = <DT_FREQ_M(20)>;
18 #clock-cells = <0>;
22 hoco: clock-hoco {
23 compatible = "fixed-clock";
[all …]
Dr7fa8d1xh.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
12 sdram: sdram-controller@40002000 {
13 compatible = "renesas,ra-sdram";
14 #address-cells = <1>;
15 #size-cells = <0>;
20 lcdif: display-controller@40342000 {
21 compatible = "renesas,ra-glcdc";
25 interrupt-names = "line";
30 compatible = "renesas,ra-mipi-dsi";
[all …]
/Zephyr-latest/boards/olimex/olimexino_stm32/
Dolimexino_stm32.dts2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f1/stm32f103r(8-b)tx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "Olimex OLIMEXINO-STM32 board";
18 zephyr,shell-uart = &usart1;
25 compatible = "gpio-leds";
37 compatible = "gpio-keys";
45 transceiver0: can-phy0 {
[all …]
/Zephyr-latest/dts/arm/st/u0/
Dstm32u073.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32u073", "st,stm32u0", "simple-bus";
14 compatible = "st,stm32-i2c-v2";
15 clock-frequency = <I2C_BITRATE_STANDARD>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 interrupt-names = "combined";
26 compatible = "st,stm32-lptim";
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
/Zephyr-latest/boards/renesas/ek_ra6m3/
Dek_ra6m3.dts2 * Copyright (c) 2024-2025 Renesas Electronics Corporation
3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/adc/adc.h>
13 #include "ek_ra6m3-pinctrl.dtsi"
16 model = "Renesas EK-RA6M3";
22 zephyr,shell-uart = &uart8;
23 zephyr,flash-controller = &flash1;
[all …]

1234