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Searched +full:mspi +full:- +full:data +full:- +full:rate (Results 1 – 15 of 15) sorted by relevance

/Zephyr-latest/tests/drivers/mspi/flash/boards/
Dnative_sim.overlay4 * SPDX-License-Identifier: Apache-2.0
15 ce-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>,
17 dqs-support;
18 software-multiperipheral;
22 compatible = "zephyr,mspi-emul-flash";
25 mspi-max-frequency = <48000000>;
26 mspi-io-mode = "MSPI_IO_MODE_QUAD";
27 mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
28 mspi-hardware-ce-num = <0>;
29 read-command = <0x0B>;
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Dapollo3p_evb.overlay3 * SPDX-License-Identifier: Apache-2.0
18 compatible = "ambiq,mspi-controller";
19 pinctrl-0 = <&mspi1_default>;
20 pinctrl-1 = <&mspi1_sleep>;
21 pinctrl-2 = <&mspi1_flash>;
22 pinctrl-names = "default","sleep","flash";
25 ce-gpios = <&gpio32_63 18 GPIO_ACTIVE_LOW>;
27 cmdq-buffer-location = ".mspi_buff";
28 cmdq-buffer-size = <256>;
31 compatible = "ambiq,mspi-device", "mspi-atxp032";
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/Zephyr-latest/dts/bindings/mspi/
Dmspi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Common fields for MSPI devices
8 on-bus: mspi
14 mspi-max-frequency:
22 mspi-io-mode:
25 - "MSPI_IO_MODE_SINGLE"
26 - "MSPI_IO_MODE_DUAL"
27 - "MSPI_IO_MODE_DUAL_1_1_2"
28 - "MSPI_IO_MODE_DUAL_1_2_2"
29 - "MSPI_IO_MODE_QUAD"
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Dambiq,mspi-device.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Ambiq MSPI device
6 compatible: "ambiq,mspi-device"
8 include: [mspi-device.yaml, "jedec,jesd216.yaml"]
11 mspi-io-mode:
14 mspi-data-rate:
17 mspi-hardware-ce-num:
25 rx-dummy:
28 tx-dummy:
31 read-command:
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/Zephyr-latest/include/zephyr/drivers/
Dmspi.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public APIs for MSPI driver
30 * @brief MSPI Driver APIs
31 * @defgroup mspi_interface MSPI Driver APIs
37 * @brief MSPI operational mode
45 * @brief MSPI duplex mode
53 * @brief MSPI I/O mode capabilities
55 * command, address and data phases.
76 * @brief MSPI data rate capabilities
77 * SINGLE stands for single data rate for all phases.
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/Zephyr-latest/samples/drivers/mspi/mspi_flash/boards/
Dapollo3p_evb.overlay4 * SPDX-License-Identifier: Apache-2.0
23 pinctrl-0 = <&mspi1_default>;
24 pinctrl-1 = <&mspi1_sleep>;
25 pinctrl-2 = <&mspi1_psram>;
26 pinctrl-3 = <&mspi1_flash>;
27 pinctrl-names = "default","sleep","psram","flash";
30 ce-gpios = <&gpio64_95 5 GPIO_ACTIVE_LOW>,
33 cmdq-buffer-location = ".mspi_buff";
34 cmdq-buffer-size = <256>;
37 compatible = "ambiq,mspi-device", "mspi-aps6404l";
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/Zephyr-latest/doc/hardware/peripherals/
Dmspi.rst3 Multi-bit SPI Bus
6 The MSPI (multi-bit SPI) is provided as a generic API to accommodate
8 address and data phases, and multiple signal lines during these phases.
16 .. _mspi-controller-api:
18 MSPI Controller API
21 Zephyr's MSPI controller API may be used when a multi-bit SPI controller
22 is present. E.g. Ambiq MSPI, QSPI, OSPI, Flexspi, etc.
25 not limited to high-speed, high density flash/psram memory devices, displays
28 The MSPI interface contains controller drivers that are SoC platform specific
29 and implement the MSPI APIs, and device drivers that reference these APIs.
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/Zephyr-latest/samples/drivers/memc/boards/
Dapollo3p_evb.overlay4 * SPDX-License-Identifier: Apache-2.0
23 pinctrl-0 = <&mspi1_default>;
24 pinctrl-1 = <&mspi1_sleep>;
25 pinctrl-2 = <&mspi1_psram>;
26 pinctrl-names = "default","sleep","psram";
29 ce-gpios = <&gpio64_95 5 GPIO_ACTIVE_LOW>,
32 cmdq-buffer-location = ".mspi_buff";
33 cmdq-buffer-size = <256>;
36 compatible = "ambiq,mspi-device", "mspi-aps6404l";
40 mspi-max-frequency = <48000000>;
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/Zephyr-latest/samples/drivers/mspi/mspi_async/boards/
Dapollo3p_evb.overlay4 * SPDX-License-Identifier: Apache-2.0
23 pinctrl-0 = <&mspi1_default>;
24 pinctrl-1 = <&mspi1_sleep>;
25 pinctrl-2 = <&mspi1_psram>;
26 pinctrl-names = "default","sleep","psram";
29 ce-gpios = <&gpio64_95 5 GPIO_ACTIVE_LOW>,
32 cmdq-buffer-location = ".mspi_buff";
33 cmdq-buffer-size = <256>;
36 compatible = "ambiq,mspi-device", "mspi-aps6404l";
40 mspi-max-frequency = <48000000>;
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/Zephyr-latest/boards/nordic/nrf9280pdk/
Dnrf9280pdk_nrf9280_cpuapp.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "nrf9280pdk_nrf9280-memory_map.dtsi"
11 #include "nrf9280pdk_nrf9280-ipc_conf.dtsi"
12 #include "nrf9280pdk_nrf9280-pinctrl.dtsi"
14 /delete-node/ &cpurad_cpusys_ipc;
15 /delete-node/ &cpusec_cpurad_ipc;
18 compatible = "nordic,nrf9280pdk_nrf9280-cpuapp";
23 zephyr,code-partition = &cpuapp_slot0_partition;
26 zephyr,shell-uart = &uart136;
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/Zephyr-latest/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20_cpuapp.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "nrf54h20dk_nrf54h20-common.dtsi"
12 /delete-node/ &cpurad_cpusys_ipc;
13 /delete-node/ &cpusec_cpurad_ipc;
16 compatible = "nordic,nrf54h20dk_nrf54h20-cpuapp";
21 zephyr,code-partition = &cpuapp_slot0_partition;
24 zephyr,shell-uart = &uart136;
26 zephyr,bt-hci = &bt_hci_ipc0;
27 nordic,802154-spinel-ipc = &ipc0;
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/Zephyr-latest/drivers/mspi/
Dmspi_ambiq_ap3.c4 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/drivers/mspi.h>
91 LOG_INST_ERR(cfg->log, "%u,Frequency not supported!", __LINE__); in mspi_set_freq()
105 LOG_INST_ERR(cfg->log, "%u, incorrect data rate, only SDR is supported.", __LINE__); in mspi_set_line()
188 if (ctx->owner) { in mspi_context_ce_control()
189 if (ctx->xfer.hold_ce && in mspi_context_ce_control()
190 ctx->xfer.ce_sw_ctrl.gpio.port != NULL) { in mspi_context_ce_control()
192 gpio_pin_set_dt(&ctx->xfer.ce_sw_ctrl.gpio, 1); in mspi_context_ce_control()
193 k_busy_wait(ctx->xfer.ce_sw_ctrl.delay); in mspi_context_ce_control()
195 k_busy_wait(ctx->xfer.ce_sw_ctrl.delay); in mspi_context_ce_control()
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Dmspi_dw.c4 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/drivers/mspi.h>
122 struct mspi_dw_data *dev_data = dev->data; in tx_data()
123 const struct mspi_dw_config *dev_config = dev->config; in tx_data()
124 const uint8_t *buf_pos = dev_data->buf_pos; in tx_data()
125 const uint8_t *buf_end = dev_data->buf_end; in tx_data()
129 * number basing on the actual FIFO level (because some data may get in tx_data()
135 uint8_t bytes_per_frame_exp = dev_data->bytes_per_frame_exp; in tx_data()
136 uint8_t tx_fifo_depth = dev_config->tx_fifo_depth_minus_1 + 1; in tx_data()
137 uint32_t data; in tx_data() local
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/Zephyr-latest/drivers/clock_control/
Dclock_control_esp32.c3 * Copyright (c) 2021-2025 Espressif Systems (Shanghai) Co., Ltd.
5 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/dt-bindings/clock/esp32_clock.h>
22 #include <zephyr/dt-bindings/clock/esp32s2_clock.h>
28 #include <zephyr/dt-bindings/clock/esp32s3_clock.h>
33 #include <zephyr/dt-bindings/clock/esp32c2_clock.h>
37 #include <zephyr/dt-bindings/clock/esp32c3_clock.h>
41 #include <zephyr/dt-bindings/clock/esp32c6_clock.h>
507 return -EALREADY; in clock_control_esp32_on()
527 uint32_t *rate) in clock_control_esp32_get_rate() argument
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/Zephyr-latest/doc/releases/
Drelease-notes-3.7.rst10 This release is the last non-maintenance 3.x release and, as such, will be the next
18 * A long-awaited :ref:`HTTP Server <http_server_interface>` library, and associated service API,
21 * :ref:`POSIX support <posix_support>` has been extended, with most Options of the IEEE 1003-2017
25 * Bluetooth Host has been extended with support for the Nordic UART Service (NUS), Hands-free Audio
29 :ref:`read-then-decode approach <sensor-read-and-decode>` that enables more types of sensors and
30 data flows than the previous fetch/get APIs.
35 * Trusted Firmware-M (TF-M) 2.1.0 and Mbed TLS 3.6.0 have been integrated into Zephyr.
39 1588) allows to synchronize time across devices with sub-microsecond accuracy.
52 * 1-Wire
71 :ref:`pinctrl-guide` for more details.
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