1/*
2 * Copyright (c) 2024 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nordic/nrf54h20_cpuapp.dtsi>
10#include "nrf54h20dk_nrf54h20-common.dtsi"
11
12/delete-node/ &cpurad_cpusys_ipc;
13/delete-node/ &cpusec_cpurad_ipc;
14
15/ {
16	compatible = "nordic,nrf54h20dk_nrf54h20-cpuapp";
17	model = "Nordic nRF54H20 DK nRF54H20 Application MCU";
18
19	chosen {
20		zephyr,console = &uart136;
21		zephyr,code-partition = &cpuapp_slot0_partition;
22		zephyr,flash = &mram1x;
23		zephyr,sram = &cpuapp_data;
24		zephyr,shell-uart = &uart136;
25		zephyr,ieee802154 = &cpuapp_ieee802154;
26		zephyr,bt-hci = &bt_hci_ipc0;
27		nordic,802154-spinel-ipc = &ipc0;
28		zephyr,canbus = &can120;
29	};
30
31	aliases {
32		led0 = &led0;
33		led1 = &led1;
34		led2 = &led2;
35		led3 = &led3;
36		resetinfo = &cpuapp_resetinfo;
37		pwm-led0 = &pwm_led2;
38		sw0 = &button0;
39		sw1 = &button1;
40		sw2 = &button2;
41		sw3 = &button3;
42		ipc-to-cpusys = &cpuapp_cpusys_ipc;
43		watchdog0 = &wdt010;
44	};
45
46	buttons {
47		compatible = "gpio-keys";
48
49		button0: button_0 {
50			gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
51			label = "Push button 0";
52			zephyr,code = <INPUT_KEY_0>;
53		};
54
55		button1: button_1 {
56			gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
57			label = "Push button 1";
58			zephyr,code = <INPUT_KEY_1>;
59		};
60
61		button2: button_2 {
62			gpios = <&gpio0 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
63			label = "Push button 2";
64			zephyr,code = <INPUT_KEY_2>;
65		};
66
67		button3: button_3 {
68			gpios = <&gpio0 11 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
69			label = "Push button 3";
70			zephyr,code = <INPUT_KEY_3>;
71		};
72	};
73
74	leds {
75		compatible = "gpio-leds";
76
77		led0: led_0 {
78			gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
79			label = "Green LED 0";
80		};
81
82		led1: led_1 {
83			gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
84			label = "Green LED 1";
85		};
86
87		led2: led_2 {
88			gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
89			label = "Green LED 2";
90		};
91
92		led3: led_3 {
93			gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
94			label = "Green LED 3";
95		};
96	};
97
98	pwmleds {
99		compatible = "pwm-leds";
100		/*
101		 * LEDs are connected to GPIO Port 9 - pins 0-3. There is no valid hardware
102		 * configuration to pass PWM signal on pis 0 and 1. First valid config is P9.2.
103		 * Signal on PWM130's channel 0 can be passed directly on GPIO Port 9 pin 2.
104		 */
105		pwm_led2: pwm_led_2 {
106			pwms = <&pwm130 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
107		};
108	};
109};
110
111&cpuapp_ram0x_region {
112	status = "okay";
113};
114
115&etr_buf_ram0x_region {
116	status = "okay";
117};
118
119&ram21_region {
120	status = "okay";
121};
122
123&cpuapp_bellboard {
124	status = "okay";
125	interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
126	interrupt-names = "irq0";
127	/* irq0:
128	 *  - 0:  cpuapp-cpusec
129	 *  - 6:  cpuapp-cpusys
130	 *  - 13: cpuapp-cpuppr
131	 *  - 14: cpuapp-cpuflpr
132	 *  - 18: cpuapp-cpurad
133	 */
134	nordic,interrupt-mapping = <0x00046041 0>;
135};
136
137&cpurad_bellboard {
138	status = "okay";
139};
140
141&cpusys_vevif {
142	status = "okay";
143};
144
145&cpusec_cpuapp_ipc {
146	status = "okay";
147	mbox-names = "tx", "rx";
148	tx-region = <&cpuapp_cpusec_ipc_shm>;
149	rx-region = <&cpusec_cpuapp_ipc_shm>;
150};
151
152&cpusec_bellboard {
153	status = "okay";
154};
155
156ipc0: &cpuapp_cpurad_ipc {
157	status = "okay";
158	mbox-names = "rx", "tx";
159	tx-region = <&cpuapp_cpurad_ipc_shm>;
160	rx-region = <&cpurad_cpuapp_ipc_shm>;
161	tx-blocks = <32>;
162	rx-blocks = <32>;
163
164	bt_hci_ipc0: bt_hci_ipc0 {
165		compatible = "zephyr,bt-hci-ipc";
166		status = "okay";
167	};
168};
169
170&cpuapp_cpusys_ipc {
171	status = "okay";
172	mbox-names = "rx", "tx";
173	tx-region = <&cpuapp_cpusys_ipc_shm>;
174	rx-region = <&cpusys_cpuapp_ipc_shm>;
175};
176
177&cpuapp_cpuppr_ipc {
178	mbox-names = "rx", "tx";
179	tx-region = <&cpuapp_cpuppr_ipc_shm>;
180	rx-region = <&cpuppr_cpuapp_ipc_shm>;
181};
182
183&cpuapp_cpuflpr_ipc {
184	mbox-names = "rx", "tx";
185	tx-region = <&cpuapp_cpuflpr_ipc_shm>;
186	rx-region = <&cpuflpr_cpuapp_ipc_shm>;
187};
188
189&cpuapp_dma_region {
190	status = "okay";
191};
192
193&cpuapp_rx_partitions {
194	status = "okay";
195};
196
197&cpuapp_rw_partitions {
198	status = "okay";
199};
200
201&cpuppr_vpr {
202	execution-memory = <&cpuppr_code_data>;
203	source-memory = <&cpuppr_code_partition>;
204};
205
206&cpuflpr_vpr {
207	execution-memory = <&cpuflpr_code_data>;
208	source-memory = <&cpuflpr_code_partition>;
209};
210
211&gpiote130 {
212	status = "okay";
213	owned-channels = <0 1 2 3 4 5 6 7>;
214};
215
216&gpio0 {
217	status = "okay";
218};
219
220&gpio9 {
221	status = "okay";
222};
223
224&grtc {
225	status = "okay";
226	child-owned-channels = <5 6>;
227	nonsecure-channels = <5 6>;
228	owned-channels = <4 5 6>;
229};
230
231&uart120 {
232	current-speed = <115200>;
233	pinctrl-0 = <&uart120_default>;
234	pinctrl-1 = <&uart120_sleep>;
235	pinctrl-names = "default", "sleep";
236};
237
238&uart135 {
239	current-speed = <115200>;
240	pinctrl-0 = <&uart135_default>;
241	pinctrl-1 = <&uart135_sleep>;
242	pinctrl-names = "default", "sleep";
243};
244
245&uart136 {
246	status = "okay";
247	memory-regions = <&cpuapp_dma_region>;
248	current-speed = <115200>;
249	pinctrl-0 = <&uart136_default>;
250	pinctrl-1 = <&uart136_sleep>;
251	pinctrl-names = "default", "sleep";
252};
253
254&gpio6 {
255	status = "okay";
256};
257
258&exmif {
259	cs-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;
260	pinctrl-0 = <&exmif_default>;
261	pinctrl-names = "default";
262	status = "okay";
263	mx25uw63: mx25uw6345g@0 {
264		compatible = "jedec,spi-nor";
265		status = "disabled";
266		reg = <0>;
267		spi-max-frequency = <DT_FREQ_M(48)>;
268		jedec-id = [c2 84 37];
269		sfdp-bfp = [
270			e5 20 8a ff  ff ff ff 03  00 ff 00 ff  00 ff 00 ff
271			ee ff ff ff  ff ff 00 ff  ff ff 00 ff  0c 20 10 d8
272			00 ff 00 ff  87 79 01 00  84 12 00 c4  cc 04 67 46
273			30 b0 30 b0  f4 bd d5 5c  00 00 00 ff  10 10 00 20
274			00 00 00 00  00 00 7c 23  48 00 00 00  00 00 88 88
275		];
276		size = <67108864>;
277		has-dpd;
278		t-enter-dpd = <10000>;
279		t-exit-dpd = <30000>;
280	};
281};
282
283&cpuapp_ieee802154 {
284	status = "okay";
285};
286
287zephyr_udc0: &usbhs {
288	status = "okay";
289};
290
291&canpll {
292	status = "okay";
293};
294
295&can120 {
296	status = "okay";
297	pinctrl-0 = <&can120_default>;
298	pinctrl-names = "default";
299};
300
301&pwm130 {
302	status = "okay";
303	pinctrl-0 = <&pwm130_default>;
304	pinctrl-1 = <&pwm130_sleep>;
305	pinctrl-names = "default", "sleep";
306	memory-regions = <&cpuapp_dma_region>;
307};
308
309&adc {
310	memory-regions = <&cpuapp_dma_region>;
311	status = "okay";
312};
313