Lines Matching +full:mspi +full:- +full:data +full:- +full:rate

3 Multi-bit SPI Bus
6 The MSPI (multi-bit SPI) is provided as a generic API to accommodate
8 address and data phases, and multiple signal lines during these phases.
16 .. _mspi-controller-api:
18 MSPI Controller API
21 Zephyr's MSPI controller API may be used when a multi-bit SPI controller
22 is present. E.g. Ambiq MSPI, QSPI, OSPI, Flexspi, etc.
25 not limited to high-speed, high density flash/psram memory devices, displays
28 The MSPI interface contains controller drivers that are SoC platform specific
29 and implement the MSPI APIs, and device drivers that reference these APIs.
30 The relationship between the controller and device drivers is many-to-many to
33 Here is a list of generic steps for initializing the MSPI controller and the
34 MSPI bus inside the device driver initialization function:
36 #. Initialize the data structure of the MSPI controller driver instance.
38    can be used, and the initialization function, config and data provided
57      to re-initialize the hardware with new parameters during runtime.
111 Here is an example for defining an MSPI controller in device tree:
112 The mspi controller's bindings should reference mspi-controller.yaml as one of the base.
114 .. code-block:: devicetree
116    mspi0: mspi@400 {
118             compatible = "zephyr,mspi-emul-controller";
121             #address-cells = < 0x1 >;
122             #size-cells = < 0x0 >;
124             clock-frequency = < 0x17d7840 >;
125             op-mode = "MSPI_CONTROLLER";
127             ce-gpios = < &gpio0 0x5 0x1 >, < &gpio0 0x12 0x1 >;
128             dqs-support;
130             pinctrl-0 = < &pinmux-mspi0 >;
131             pinctrl-names = "default";
134 Here is an example for defining an MSPI device in device tree:
135 The mspi device's bindings should reference mspi-device.yaml as one of the base.
137 .. code-block:: devicetree
143                      compatible = "zephyr,mspi-emul-device";
148                      mspi-max-frequency = < 0x2dc6c00 >;
149                      mspi-io-mode = "MSPI_IO_MODE_QUAD";
150                      mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
151                      mspi-hardware-ce-num = < 0x0 >;
152                      read-instruction = < 0xb >;
153                      write-instruction = < 0x2 >;
154                      instruction-length = "INSTR_1_BYTE";
155                      address-length = "ADDR_4_BYTE";
156                      rx-dummy = < 0x8 >;
157                      tx-dummy = < 0x0 >;
158                      xip-config = < 0x0 0x0 0x0 0x0 >;
159                      ce-break-config = < 0x0 0x0 >;
164 User should specify target operating parameters in the DTS such as ``mspi-max-frequency``,
165 ``mspi-io-mode`` and ``mspi-data-rate`` even though they may subject to change during runtime.
178 other relevant mspi struct or private data structures. In particular, :c:struct:`mspi_dev_id`