1# Copyright (c) 2024, Ambiq Micro Inc. <www.ambiq.com>
2# SPDX-License-Identifier: Apache-2.0
3
4description: Ambiq MSPI device
5
6compatible: "ambiq,mspi-device"
7
8include: [mspi-device.yaml, "jedec,jesd216.yaml"]
9
10properties:
11  mspi-io-mode:
12    required: true
13
14  mspi-data-rate:
15    required: true
16
17  mspi-hardware-ce-num:
18    type: int
19    required: true
20    default: 0
21    description: |
22      It can be only CE0 or CE1,
23      but there could be multiple of CE0 or CE1 for a controller
24
25  rx-dummy:
26    required: true
27
28  tx-dummy:
29    required: true
30
31  read-command:
32    required: true
33
34  write-command:
35    required: true
36
37  command-length:
38    required: true
39
40  address-length:
41    required: true
42
43  ambiq,timing-config-mask:
44    type: int
45    required: true
46    description: |
47      It must be defined in the board DTS based on Soc series.
48
49  ambiq,timing-config:
50    type: array
51    default: [0, 0, 0, 0, 0, 0, 0, 0]
52    description: |
53      Array of tuples to configure the timing parameters
54      default =
55      <
56        .ui8WriteLatency   = 0,
57        .ui8TurnAround     = 0,
58        .bTxNeg            = false,
59        .bRxNeg            = false,
60        .bRxCap            = false,
61        .ui32TxDQSDelay    = 0,
62        .ui32RxDQSDelay    = 0,
63        .ui32RXDQSDelayEXT = 0,
64      >
65