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Searched refs:RCC_AHBENR_TSCEN_Pos (Results 1 – 25 of 34) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h3633 #define RCC_AHBENR_TSCEN_Pos (24U) macro
3634 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f051x8.h3658 #define RCC_AHBENR_TSCEN_Pos (24U) macro
3659 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f071xb.h4098 #define RCC_AHBENR_TSCEN_Pos (24U) macro
4099 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f042x6.h7405 #define RCC_AHBENR_TSCEN_Pos (24U) macro
7406 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f048xx.h7381 #define RCC_AHBENR_TSCEN_Pos (24U) macro
7382 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f072xb.h7879 #define RCC_AHBENR_TSCEN_Pos (24U) macro
7880 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f091xc.h8341 #define RCC_AHBENR_TSCEN_Pos (24U) macro
8342 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f098xx.h8317 #define RCC_AHBENR_TSCEN_Pos (24U) macro
8318 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f078xx.h7855 #define RCC_AHBENR_TSCEN_Pos (24U) macro
7856 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h4043 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4044 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l062xx.h4174 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4175 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l053xx.h4190 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4191 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l072xx.h4222 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4223 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l073xx.h4367 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4368 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l083xx.h4498 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4499 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l063xx.h4319 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4320 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
Dstm32l082xx.h4353 #define RCC_AHBENR_TSCEN_Pos (16U) macro
4354 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x00010000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h5057 #define RCC_AHBENR_TSCEN_Pos (24U) macro
5058 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f318xx.h5050 #define RCC_AHBENR_TSCEN_Pos (24U) macro
5051 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f378xx.h7908 #define RCC_AHBENR_TSCEN_Pos (24U) macro
7909 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f373xc.h8001 #define RCC_AHBENR_TSCEN_Pos (24U) macro
8002 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32f302x8.h8679 #define RCC_AHBENR_TSCEN_Pos (24U) macro
8680 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5337 #define RCC_AHBENR_TSCEN_Pos (24U) macro
5338 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32u083xx.h6147 #define RCC_AHBENR_TSCEN_Pos (24U) macro
6148 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */
Dstm32u073xx.h5883 #define RCC_AHBENR_TSCEN_Pos (24U) macro
5884 #define RCC_AHBENR_TSCEN_Msk (0x1UL << RCC_AHBENR_TSCEN_Pos) /*!< 0x01000000 */

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