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Searched refs:CR3 (Results 1 – 25 of 636) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_usart.h1435 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1448 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1461 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1474 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1493 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1511 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1522 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
1533 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1544 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); in LL_USART_IsEnabledOneBitSamp()
1555 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_EnableOverrunDetect()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_usart.h622 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_EnableClockInStopMode()
634 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_DisableClockInStopMode()
645 return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); in LL_USART_IsClockEnabledInStopMode()
1419 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1432 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1445 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1458 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1477 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1495 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1506 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_usart.h643 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_EnableClockInStopMode()
655 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_DisableClockInStopMode()
666 return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); in LL_USART_IsClockEnabledInStopMode()
1442 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1455 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1468 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1481 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1500 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1518 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1529 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_usart.h712 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
731 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
751 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
770 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
798 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, in LL_USART_ConfigFIFOsThreshold()
1666 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1679 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1692 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1705 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1724 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_usart.h721 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
740 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1675 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1688 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1701 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1714 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1733 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_usart.h721 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
740 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1675 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1688 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1701 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1714 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1733 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_usart.h714 MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
733 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
753 MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
772 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
800 …MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_P… in LL_USART_ConfigFIFOsThreshold()
1668 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1681 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1694 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1707 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1726 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_usart.h720 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
739 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
759 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
778 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
806 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1674 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1687 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1700 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1713 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1732 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_usart.h720 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
739 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
759 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
778 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
806 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1674 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1687 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1700 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1713 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1732 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_usart.h720 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
739 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
759 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
778 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
806 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1674 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1687 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1700 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1713 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1732 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_usart.h736 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
755 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
775 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
794 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
822 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1692 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1705 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1718 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1731 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1750 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_usart.h721 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
740 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1675 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1688 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1701 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1714 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1733 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_usart.h721 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
740 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1675 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1688 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1701 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1714 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1733 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_usart.h720 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
739 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
759 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
778 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
806 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1674 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1687 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1700 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1713 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1732 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_usart.h721 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
740 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
760 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
779 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1675 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1688 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1701 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1714 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1733 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_usart.h720 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
739 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
759 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
778 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
806 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1674 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1687 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1700 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1713 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1732 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_usart.h780 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
799 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
819 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
838 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
866 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
923 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_EnableClockInStopMode()
935 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); in LL_USART_DisableClockInStopMode()
946 return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); in LL_USART_IsClockEnabledInStopMode()
1774 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1787 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_usart.h1386 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1399 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1412 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1425 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1444 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1462 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1473 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
1484 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1495 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); in LL_USART_IsEnabledOneBitSamp()
1506 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_EnableOverrunDetect()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_usart.h740 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
759 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
779 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
798 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
826 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1694 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1707 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1720 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1733 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1752 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_usart.h736 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
755 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
775 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
794 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
822 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1690 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1703 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1716 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1729 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1748 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_irda.c339 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in HAL_IRDA_Init()
348 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.IrDAMode); in HAL_IRDA_Init()
351 SET_BIT(hirda->Instance->CR3, USART_CR3_IREN); in HAL_IRDA_Init()
1019 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_IT()
1086 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_Transmit_DMA()
1158 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_DMA()
1162 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_Receive_DMA()
1185 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1189 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1192 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_DMAPause()
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_irda.c339 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in HAL_IRDA_Init()
348 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.IrDAMode); in HAL_IRDA_Init()
351 SET_BIT(hirda->Instance->CR3, USART_CR3_IREN); in HAL_IRDA_Init()
1019 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_IT()
1086 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_Transmit_DMA()
1158 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_DMA()
1162 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_Receive_DMA()
1185 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1189 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1192 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_DMAPause()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_irda.c339 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in HAL_IRDA_Init()
348 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.IrDAMode); in HAL_IRDA_Init()
351 SET_BIT(hirda->Instance->CR3, USART_CR3_IREN); in HAL_IRDA_Init()
1019 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_IT()
1086 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_Transmit_DMA()
1158 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_DMA()
1162 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_Receive_DMA()
1185 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1189 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1192 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_DMAPause()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_irda.c339 CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in HAL_IRDA_Init()
348 MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.IrDAMode); in HAL_IRDA_Init()
351 SET_BIT(hirda->Instance->CR3, USART_CR3_IREN); in HAL_IRDA_Init()
1019 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_IT()
1086 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_Transmit_DMA()
1158 SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); in HAL_IRDA_Receive_DMA()
1162 SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_Receive_DMA()
1185 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1189 CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); in HAL_IRDA_DMAPause()
1192 dmarequest = HAL_IS_BIT_SET(hirda->Instance->CR3, USART_CR3_DMAR); in HAL_IRDA_DMAPause()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_usart.h893 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
906 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
919 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
932 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
951 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
969 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
980 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
991 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1002 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)); in LL_USART_IsEnabledOneBitSamp()
1088 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
[all …]

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