Lines Matching refs:CR3
740 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
759 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
779 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
798 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
826 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1694 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1707 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1720 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1733 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1752 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1770 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1781 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
1792 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1803 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); in LL_USART_IsEnabledOneBitSamp()
1814 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_EnableOverrunDetect()
1825 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_DisableOverrunDetect()
1836 return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); in LL_USART_IsEnabledOverrunDetect()
2017 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2030 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2043 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2059 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); in LL_USART_SetIrdaPowerMode()
2074 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); in LL_USART_GetIrdaPowerMode()
2124 SET_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_EnableSmartcardNACK()
2137 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_DisableSmartcardNACK()
2150 return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); in LL_USART_IsEnabledSmartcardNACK()
2163 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_EnableSmartcard()
2176 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_DisableSmartcard()
2189 return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL); in LL_USART_IsEnabledSmartcard()
2208 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); in LL_USART_SetSmartcardAutoRetryCount()
2221 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); in LL_USART_GetSmartcardAutoRetryCount()
2300 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_EnableHalfDuplex()
2313 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_DisableHalfDuplex()
2326 return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); in LL_USART_IsEnabledHalfDuplex()
2567 SET_BIT(USARTx->CR3, USART_CR3_DEM); in LL_USART_EnableDEMode()
2580 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); in LL_USART_DisableDEMode()
2593 return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); in LL_USART_IsEnabledDEMode()
2609 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity); in LL_USART_SetDESignalPolarity()
2624 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); in LL_USART_GetDESignalPolarity()
2667 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2704 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2745 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2784 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2786 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_ConfigHalfDuplexMode()
2825 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2830 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_ConfigSmartcardMode()
2869 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigIrdaMode()
2871 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2908 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
3565 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_EnableIT_ERROR()
3578 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_EnableIT_CTS()
3591 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE); in LL_USART_EnableIT_TXFT()
3604 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); in LL_USART_EnableIT_TCBGT()
3617 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE); in LL_USART_EnableIT_RXFT()
3769 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_DisableIT_ERROR()
3782 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_DisableIT_CTS()
3795 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE); in LL_USART_DisableIT_TXFT()
3808 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); in LL_USART_DisableIT_TCBGT()
3821 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE); in LL_USART_DisableIT_RXFT()
3969 return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_ERROR()
3982 return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_CTS()
3995 return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_TXFT()
4008 return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_TCBGT()
4021 return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_RXFT()
4040 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_EnableDMAReq_RX()
4051 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_DisableDMAReq_RX()
4062 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); in LL_USART_IsEnabledDMAReq_RX()
4073 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_EnableDMAReq_TX()
4084 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_DisableDMAReq_TX()
4095 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); in LL_USART_IsEnabledDMAReq_TX()
4106 SET_BIT(USARTx->CR3, USART_CR3_DDRE); in LL_USART_EnableDMADeactOnRxErr()
4117 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE); in LL_USART_DisableDMADeactOnRxErr()
4128 return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); in LL_USART_IsEnabledDMADeactOnRxErr()