Lines Matching refs:CR3
736 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); in LL_USART_SetTXFIFOThreshold()
755 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); in LL_USART_GetTXFIFOThreshold()
775 ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); in LL_USART_SetRXFIFOThreshold()
794 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); in LL_USART_GetRXFIFOThreshold()
822 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX… in LL_USART_ConfigFIFOsThreshold()
1690 SET_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_EnableRTSHWFlowCtrl()
1703 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
1716 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
1729 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
1748 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
1766 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
1777 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
1788 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1799 return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL); in LL_USART_IsEnabledOneBitSamp()
1810 CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_EnableOverrunDetect()
1821 SET_BIT(USARTx->CR3, USART_CR3_OVRDIS); in LL_USART_DisableOverrunDetect()
1832 return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL); in LL_USART_IsEnabledOverrunDetect()
2013 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
2026 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
2039 return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL); in LL_USART_IsEnabledIrda()
2055 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); in LL_USART_SetIrdaPowerMode()
2070 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); in LL_USART_GetIrdaPowerMode()
2120 SET_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_EnableSmartcardNACK()
2133 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_DisableSmartcardNACK()
2146 return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); in LL_USART_IsEnabledSmartcardNACK()
2159 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_EnableSmartcard()
2172 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_DisableSmartcard()
2185 return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL); in LL_USART_IsEnabledSmartcard()
2204 MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); in LL_USART_SetSmartcardAutoRetryCount()
2217 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); in LL_USART_GetSmartcardAutoRetryCount()
2296 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_EnableHalfDuplex()
2309 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_DisableHalfDuplex()
2322 return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL); in LL_USART_IsEnabledHalfDuplex()
2563 SET_BIT(USARTx->CR3, USART_CR3_DEM); in LL_USART_EnableDEMode()
2576 CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); in LL_USART_DisableDEMode()
2589 return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); in LL_USART_IsEnabledDEMode()
2605 MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity); in LL_USART_SetDESignalPolarity()
2620 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); in LL_USART_GetDESignalPolarity()
2663 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
2700 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
2741 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
2780 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
2782 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_ConfigHalfDuplexMode()
2821 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
2826 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_ConfigSmartcardMode()
2865 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigIrdaMode()
2867 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
2904 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
3561 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_EnableIT_ERROR()
3574 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_EnableIT_CTS()
3587 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE); in LL_USART_EnableIT_TXFT()
3600 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); in LL_USART_EnableIT_TCBGT()
3613 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE); in LL_USART_EnableIT_RXFT()
3765 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_DisableIT_ERROR()
3778 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_DisableIT_CTS()
3791 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE); in LL_USART_DisableIT_TXFT()
3804 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); in LL_USART_DisableIT_TCBGT()
3817 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE); in LL_USART_DisableIT_RXFT()
3965 return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_ERROR()
3978 return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_CTS()
3991 return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_TXFT()
4004 return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_TCBGT()
4017 return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL); in LL_USART_IsEnabledIT_RXFT()
4036 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_EnableDMAReq_RX()
4047 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_DisableDMAReq_RX()
4058 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL); in LL_USART_IsEnabledDMAReq_RX()
4069 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_EnableDMAReq_TX()
4080 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_DisableDMAReq_TX()
4091 return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); in LL_USART_IsEnabledDMAReq_TX()
4102 SET_BIT(USARTx->CR3, USART_CR3_DDRE); in LL_USART_EnableDMADeactOnRxErr()
4113 CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE); in LL_USART_DisableDMADeactOnRxErr()
4124 return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL); in LL_USART_IsEnabledDMADeactOnRxErr()