721   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);  in LL_USART_SetTXFIFOThreshold()
740   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);  in LL_USART_GetTXFIFOThreshold()
760   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);  in LL_USART_SetRXFIFOThreshold()
779   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);  in LL_USART_GetRXFIFOThreshold()
807 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX…  in LL_USART_ConfigFIFOsThreshold()
1675   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
1688   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_DisableRTSHWFlowCtrl()
1701   SET_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_EnableCTSHWFlowCtrl()
1714   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_DisableCTSHWFlowCtrl()
1733   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);  in LL_USART_SetHWFlowCtrl()
1751   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));  in LL_USART_GetHWFlowCtrl()
1762   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_EnableOneBitSamp()
1773   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_DisableOneBitSamp()
1784   return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);  in LL_USART_IsEnabledOneBitSamp()
1795   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_EnableOverrunDetect()
1806   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_DisableOverrunDetect()
1817   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);  in LL_USART_IsEnabledOverrunDetect()
1834   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);  in LL_USART_SetWKUPType()
1850   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));  in LL_USART_GetWKUPType()
2031   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_EnableIrda()
2044   CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_DisableIrda()
2057   return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);  in LL_USART_IsEnabledIrda()
2073   MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);  in LL_USART_SetIrdaPowerMode()
2088   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));  in LL_USART_GetIrdaPowerMode()
2138   SET_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_EnableSmartcardNACK()
2151   CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_DisableSmartcardNACK()
2164   return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcardNACK()
2177   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_EnableSmartcard()
2190   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_DisableSmartcard()
2203   return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcard()
2222   MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);  in LL_USART_SetSmartcardAutoRetryCount()
2235   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);  in LL_USART_GetSmartcardAutoRetryCount()
2314   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_EnableHalfDuplex()
2327   CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_DisableHalfDuplex()
2340   return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);  in LL_USART_IsEnabledHalfDuplex()
2581   SET_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_EnableDEMode()
2594   CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_DisableDEMode()
2607   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);  in LL_USART_IsEnabledDEMode()
2623   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);  in LL_USART_SetDESignalPolarity()
2638   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));  in LL_USART_GetDESignalPolarity()
2681   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigAsyncMode()
2718   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSyncMode()
2759   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigLINMode()
2798   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));  in LL_USART_ConfigHalfDuplexMode()
2800   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_ConfigHalfDuplexMode()
2839   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSmartcardMode()
2844   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_ConfigSmartcardMode()
2883   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigIrdaMode()
2885   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_ConfigIrdaMode()
2922   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));  in LL_USART_ConfigMultiProcessMode()
3605   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_EnableIT_ERROR()
3618   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_EnableIT_CTS()
3631   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_EnableIT_WKUP()
3644   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_EnableIT_TXFT()
3657   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_EnableIT_TCBGT()
3670   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_EnableIT_RXFT()
3822   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_DisableIT_ERROR()
3835   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_DisableIT_CTS()
3848   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_DisableIT_WKUP()
3861   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_DisableIT_TXFT()
3874   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_DisableIT_TCBGT()
3887   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_DisableIT_RXFT()
4035   return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_ERROR()
4048   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_CTS()
4061   return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_WKUP()
4074   return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TXFT()
4087   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TCBGT()
4100   return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_RXFT()
4119   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_EnableDMAReq_RX()
4130   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_DisableDMAReq_RX()
4141   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_RX()
4152   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_EnableDMAReq_TX()
4163   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_DisableDMAReq_TX()
4174   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_TX()
4185   SET_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_EnableDMADeactOnRxErr()
4196   CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_DisableDMADeactOnRxErr()
4207   return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMADeactOnRxErr()