780   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);  in LL_USART_SetTXFIFOThreshold()
799   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);  in LL_USART_GetTXFIFOThreshold()
819   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);  in LL_USART_SetRXFIFOThreshold()
838   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);  in LL_USART_GetRXFIFOThreshold()
866 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX…  in LL_USART_ConfigFIFOsThreshold()
923   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM);  in LL_USART_EnableClockInStopMode()
935   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);  in LL_USART_DisableClockInStopMode()
946   return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM));  in LL_USART_IsClockEnabledInStopMode()
1774   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
1787   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_DisableRTSHWFlowCtrl()
1800   SET_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_EnableCTSHWFlowCtrl()
1813   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_DisableCTSHWFlowCtrl()
1832   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);  in LL_USART_SetHWFlowCtrl()
1850   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));  in LL_USART_GetHWFlowCtrl()
1861   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_EnableOneBitSamp()
1872   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_DisableOneBitSamp()
1883   return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);  in LL_USART_IsEnabledOneBitSamp()
1894   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_EnableOverrunDetect()
1905   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_DisableOverrunDetect()
1916   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);  in LL_USART_IsEnabledOverrunDetect()
1933   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);  in LL_USART_SetWKUPType()
1949   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));  in LL_USART_GetWKUPType()
2165   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_EnableIrda()
2178   CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_DisableIrda()
2191   return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);  in LL_USART_IsEnabledIrda()
2207   MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);  in LL_USART_SetIrdaPowerMode()
2222   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));  in LL_USART_GetIrdaPowerMode()
2272   SET_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_EnableSmartcardNACK()
2285   CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_DisableSmartcardNACK()
2298   return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcardNACK()
2311   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_EnableSmartcard()
2324   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_DisableSmartcard()
2337   return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcard()
2356   MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);  in LL_USART_SetSmartcardAutoRetryCount()
2369   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);  in LL_USART_GetSmartcardAutoRetryCount()
2448   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_EnableHalfDuplex()
2461   CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_DisableHalfDuplex()
2474   return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);  in LL_USART_IsEnabledHalfDuplex()
2717   SET_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_EnableDEMode()
2730   CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_DisableDEMode()
2743   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);  in LL_USART_IsEnabledDEMode()
2759   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);  in LL_USART_SetDESignalPolarity()
2774   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));  in LL_USART_GetDESignalPolarity()
2817   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigAsyncMode()
2854   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSyncMode()
2895   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigLINMode()
2934   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));  in LL_USART_ConfigHalfDuplexMode()
2936   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_ConfigHalfDuplexMode()
2975   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSmartcardMode()
2980   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_ConfigSmartcardMode()
3019   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigIrdaMode()
3021   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_ConfigIrdaMode()
3058   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));  in LL_USART_ConfigMultiProcessMode()
3815   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_EnableIT_ERROR()
3828   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_EnableIT_CTS()
3841   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_EnableIT_WKUP()
3855   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_EnableIT_TXFT()
3871   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_EnableIT_TCBGT()
3886   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_EnableIT_RXFT()
4069   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_DisableIT_ERROR()
4082   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_DisableIT_CTS()
4095   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_DisableIT_WKUP()
4109   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_DisableIT_TXFT()
4125   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_DisableIT_TCBGT()
4140   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_DisableIT_RXFT()
4319   return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_ERROR()
4332   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_CTS()
4345   return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_WKUP()
4359   return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TXFT()
4375   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TCBGT()
4390   return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_RXFT()
4410   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_EnableDMAReq_RX()
4421   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_DisableDMAReq_RX()
4432   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_RX()
4443   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_EnableDMAReq_TX()
4454   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_DisableDMAReq_TX()
4465   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_TX()
4476   SET_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_EnableDMADeactOnRxErr()
4487   CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_DisableDMADeactOnRxErr()
4498   return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMADeactOnRxErr()