643   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM);  in LL_USART_EnableClockInStopMode()
655   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);  in LL_USART_DisableClockInStopMode()
666   return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM));  in LL_USART_IsClockEnabledInStopMode()
1442   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
1455   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_DisableRTSHWFlowCtrl()
1468   SET_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_EnableCTSHWFlowCtrl()
1481   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_DisableCTSHWFlowCtrl()
1500   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);  in LL_USART_SetHWFlowCtrl()
1518   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));  in LL_USART_GetHWFlowCtrl()
1529   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_EnableOneBitSamp()
1540   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_DisableOneBitSamp()
1551   return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);  in LL_USART_IsEnabledOneBitSamp()
1562   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_EnableOverrunDetect()
1573   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_DisableOverrunDetect()
1584   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);  in LL_USART_IsEnabledOverrunDetect()
1603   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);  in LL_USART_SetWKUPType()
1619   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));  in LL_USART_GetWKUPType()
1765   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_EnableIrda()
1778   CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_DisableIrda()
1791   return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);  in LL_USART_IsEnabledIrda()
1807   MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);  in LL_USART_SetIrdaPowerMode()
1822   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));  in LL_USART_GetIrdaPowerMode()
1872   SET_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_EnableSmartcardNACK()
1885   CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_DisableSmartcardNACK()
1898   return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcardNACK()
1911   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_EnableSmartcard()
1924   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_DisableSmartcard()
1937   return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcard()
1956   MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);  in LL_USART_SetSmartcardAutoRetryCount()
1969   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);  in LL_USART_GetSmartcardAutoRetryCount()
2048   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_EnableHalfDuplex()
2061   CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_DisableHalfDuplex()
2074   return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);  in LL_USART_IsEnabledHalfDuplex()
2227   SET_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_EnableDEMode()
2240   CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_DisableDEMode()
2253   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);  in LL_USART_IsEnabledDEMode()
2269   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);  in LL_USART_SetDESignalPolarity()
2284   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));  in LL_USART_GetDESignalPolarity()
2327   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigAsyncMode()
2364   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSyncMode()
2405   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigLINMode()
2444   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));  in LL_USART_ConfigHalfDuplexMode()
2446   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_ConfigHalfDuplexMode()
2485   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSmartcardMode()
2490   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_ConfigSmartcardMode()
2529   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigIrdaMode()
2531   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_ConfigIrdaMode()
2568   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));  in LL_USART_ConfigMultiProcessMode()
3136   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_EnableIT_ERROR()
3149   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_EnableIT_CTS()
3164   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_EnableIT_WKUP()
3181   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_EnableIT_TCBGT()
3300   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_DisableIT_ERROR()
3313   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_DisableIT_CTS()
3328   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_DisableIT_WKUP()
3345   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_DisableIT_TCBGT()
3460   return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_ERROR()
3473   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_CTS()
3488   return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_WKUP()
3505   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TCBGT()
3525   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_EnableDMAReq_RX()
3536   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_DisableDMAReq_RX()
3547   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_RX()
3558   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_EnableDMAReq_TX()
3569   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_DisableDMAReq_TX()
3580   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_TX()
3591   SET_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_EnableDMADeactOnRxErr()
3602   CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_DisableDMADeactOnRxErr()
3613   return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMADeactOnRxErr()