736   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);  in LL_USART_SetTXFIFOThreshold()
755   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);  in LL_USART_GetTXFIFOThreshold()
775   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);  in LL_USART_SetRXFIFOThreshold()
794   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);  in LL_USART_GetRXFIFOThreshold()
822 …ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TX…  in LL_USART_ConfigFIFOsThreshold()
1692   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
1705   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_DisableRTSHWFlowCtrl()
1718   SET_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_EnableCTSHWFlowCtrl()
1731   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_DisableCTSHWFlowCtrl()
1750   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);  in LL_USART_SetHWFlowCtrl()
1768   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));  in LL_USART_GetHWFlowCtrl()
1779   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_EnableOneBitSamp()
1790   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_DisableOneBitSamp()
1801   return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);  in LL_USART_IsEnabledOneBitSamp()
1812   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_EnableOverrunDetect()
1823   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_DisableOverrunDetect()
1834   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);  in LL_USART_IsEnabledOverrunDetect()
1853   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);  in LL_USART_SetWKUPType()
1869   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));  in LL_USART_GetWKUPType()
2052   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_EnableIrda()
2065   CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_DisableIrda()
2078   return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);  in LL_USART_IsEnabledIrda()
2094   MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);  in LL_USART_SetIrdaPowerMode()
2109   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));  in LL_USART_GetIrdaPowerMode()
2159   SET_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_EnableSmartcardNACK()
2172   CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_DisableSmartcardNACK()
2185   return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcardNACK()
2198   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_EnableSmartcard()
2211   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_DisableSmartcard()
2224   return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcard()
2243   MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);  in LL_USART_SetSmartcardAutoRetryCount()
2256   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);  in LL_USART_GetSmartcardAutoRetryCount()
2335   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_EnableHalfDuplex()
2348   CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_DisableHalfDuplex()
2361   return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);  in LL_USART_IsEnabledHalfDuplex()
2602   SET_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_EnableDEMode()
2615   CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_DisableDEMode()
2628   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);  in LL_USART_IsEnabledDEMode()
2644   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);  in LL_USART_SetDESignalPolarity()
2659   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));  in LL_USART_GetDESignalPolarity()
2702   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigAsyncMode()
2739   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSyncMode()
2780   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigLINMode()
2819   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));  in LL_USART_ConfigHalfDuplexMode()
2821   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_ConfigHalfDuplexMode()
2860   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSmartcardMode()
2865   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_ConfigSmartcardMode()
2904   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigIrdaMode()
2906   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_ConfigIrdaMode()
2943   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));  in LL_USART_ConfigMultiProcessMode()
3634   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_EnableIT_ERROR()
3647   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_EnableIT_CTS()
3662   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_EnableIT_WKUP()
3677   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_EnableIT_TXFT()
3690   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_EnableIT_TCBGT()
3703   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_EnableIT_RXFT()
3855   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_DisableIT_ERROR()
3868   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_DisableIT_CTS()
3883   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_DisableIT_WKUP()
3898   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_DisableIT_TXFT()
3911   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_DisableIT_TCBGT()
3924   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_DisableIT_RXFT()
4072   return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_ERROR()
4085   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_CTS()
4100   return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_WKUP()
4115   return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TXFT()
4128   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TCBGT()
4141   return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_RXFT()
4160   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_EnableDMAReq_RX()
4171   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_DisableDMAReq_RX()
4182   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_RX()
4193   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_EnableDMAReq_TX()
4204   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_DisableDMAReq_TX()
4215   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_TX()
4226   SET_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_EnableDMADeactOnRxErr()
4237   CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_DisableDMADeactOnRxErr()
4248   return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMADeactOnRxErr()