Lines Matching refs:CR3

893   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
906 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); in LL_USART_DisableRTSHWFlowCtrl()
919 SET_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_EnableCTSHWFlowCtrl()
932 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE); in LL_USART_DisableCTSHWFlowCtrl()
951 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); in LL_USART_SetHWFlowCtrl()
969 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); in LL_USART_GetHWFlowCtrl()
980 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_EnableOneBitSamp()
991 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT); in LL_USART_DisableOneBitSamp()
1002 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)); in LL_USART_IsEnabledOneBitSamp()
1088 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_EnableIrda()
1101 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_DisableIrda()
1114 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)); in LL_USART_IsEnabledIrda()
1130 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); in LL_USART_SetIrdaPowerMode()
1145 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP)); in LL_USART_GetIrdaPowerMode()
1195 SET_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_EnableSmartcardNACK()
1208 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); in LL_USART_DisableSmartcardNACK()
1221 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)); in LL_USART_IsEnabledSmartcardNACK()
1234 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_EnableSmartcard()
1247 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_DisableSmartcard()
1260 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)); in LL_USART_IsEnabledSmartcard()
1339 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_EnableHalfDuplex()
1352 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_DisableHalfDuplex()
1365 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)); in LL_USART_IsEnabledHalfDuplex()
1485 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigAsyncMode()
1521 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSyncMode()
1561 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigLINMode()
1599 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); in LL_USART_ConfigHalfDuplexMode()
1601 SET_BIT(USARTx->CR3, USART_CR3_HDSEL); in LL_USART_ConfigHalfDuplexMode()
1639 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); in LL_USART_ConfigSmartcardMode()
1644 SET_BIT(USARTx->CR3, USART_CR3_SCEN); in LL_USART_ConfigSmartcardMode()
1682 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL)); in LL_USART_ConfigIrdaMode()
1684 SET_BIT(USARTx->CR3, USART_CR3_IREN); in LL_USART_ConfigIrdaMode()
1720 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); in LL_USART_ConfigMultiProcessMode()
2098 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_EnableIT_ERROR()
2111 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_EnableIT_CTS()
2194 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); in LL_USART_DisableIT_ERROR()
2207 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); in LL_USART_DisableIT_CTS()
2286 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)); in LL_USART_IsEnabledIT_ERROR()
2299 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)); in LL_USART_IsEnabledIT_CTS()
2318 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_EnableDMAReq_RX()
2329 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); in LL_USART_DisableDMAReq_RX()
2340 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)); in LL_USART_IsEnabledDMAReq_RX()
2351 ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_EnableDMAReq_TX()
2362 ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); in LL_USART_DisableDMAReq_TX()
2373 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)); in LL_USART_IsEnabledDMAReq_TX()